0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 // Copyright 2019 IBM Corp.
0003
0004 /dts-v1/;
0005
0006 #include "aspeed-g6.dtsi"
0007 #include <dt-bindings/gpio/aspeed-gpio.h>
0008
0009 / {
0010 model = "AST2600 EVB";
0011 compatible = "aspeed,ast2600-evb-a1", "aspeed,ast2600";
0012
0013 aliases {
0014 serial4 = &uart5;
0015 };
0016
0017 chosen {
0018 bootargs = "console=ttyS4,115200n8";
0019 };
0020
0021 memory@80000000 {
0022 device_type = "memory";
0023 reg = <0x80000000 0x80000000>;
0024 };
0025
0026 reserved-memory {
0027 #address-cells = <1>;
0028 #size-cells = <1>;
0029 ranges;
0030
0031 video_engine_memory: video {
0032 size = <0x04000000>;
0033 alignment = <0x01000000>;
0034 compatible = "shared-dma-pool";
0035 reusable;
0036 };
0037
0038 gfx_memory: framebuffer {
0039 size = <0x01000000>;
0040 alignment = <0x01000000>;
0041 compatible = "shared-dma-pool";
0042 reusable;
0043 };
0044 };
0045
0046 vcc_sdhci0: regulator-vcc-sdhci0 {
0047 compatible = "regulator-fixed";
0048 regulator-name = "SDHCI0 Vcc";
0049 regulator-min-microvolt = <3300000>;
0050 regulator-max-microvolt = <3300000>;
0051 gpios = <&gpio0 ASPEED_GPIO(V, 0) GPIO_ACTIVE_HIGH>;
0052 enable-active-high;
0053 };
0054
0055 vccq_sdhci0: regulator-vccq-sdhci0 {
0056 compatible = "regulator-gpio";
0057 regulator-name = "SDHCI0 VccQ";
0058 regulator-min-microvolt = <1800000>;
0059 regulator-max-microvolt = <3300000>;
0060 gpios = <&gpio0 ASPEED_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
0061 gpios-states = <1>;
0062 states = <3300000 1>,
0063 <1800000 0>;
0064 };
0065
0066 vcc_sdhci1: regulator-vcc-sdhci1 {
0067 compatible = "regulator-fixed";
0068 regulator-name = "SDHCI1 Vcc";
0069 regulator-min-microvolt = <3300000>;
0070 regulator-max-microvolt = <3300000>;
0071 gpios = <&gpio0 ASPEED_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
0072 enable-active-high;
0073 };
0074
0075 vccq_sdhci1: regulator-vccq-sdhci1 {
0076 compatible = "regulator-gpio";
0077 regulator-name = "SDHCI1 VccQ";
0078 regulator-min-microvolt = <1800000>;
0079 regulator-max-microvolt = <3300000>;
0080 gpios = <&gpio0 ASPEED_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
0081 gpios-states = <1>;
0082 states = <3300000 1>,
0083 <1800000 0>;
0084 };
0085 };
0086
0087 &mdio0 {
0088 status = "okay";
0089
0090 ethphy0: ethernet-phy@0 {
0091 compatible = "ethernet-phy-ieee802.3-c22";
0092 reg = <0>;
0093 };
0094 };
0095
0096 &mdio1 {
0097 status = "okay";
0098
0099 ethphy1: ethernet-phy@0 {
0100 compatible = "ethernet-phy-ieee802.3-c22";
0101 reg = <0>;
0102 };
0103 };
0104
0105 &mdio2 {
0106 status = "okay";
0107
0108 ethphy2: ethernet-phy@0 {
0109 compatible = "ethernet-phy-ieee802.3-c22";
0110 reg = <0>;
0111 };
0112 };
0113
0114 &mdio3 {
0115 status = "okay";
0116
0117 ethphy3: ethernet-phy@0 {
0118 compatible = "ethernet-phy-ieee802.3-c22";
0119 reg = <0>;
0120 };
0121 };
0122
0123 &mac0 {
0124 status = "okay";
0125
0126 phy-mode = "rgmii-rxid";
0127 phy-handle = <ðphy0>;
0128
0129 pinctrl-names = "default";
0130 pinctrl-0 = <&pinctrl_rgmii1_default>;
0131 };
0132
0133
0134 &mac1 {
0135 status = "okay";
0136
0137 phy-mode = "rgmii-rxid";
0138 phy-handle = <ðphy1>;
0139
0140 pinctrl-names = "default";
0141 pinctrl-0 = <&pinctrl_rgmii2_default>;
0142 };
0143
0144 &mac2 {
0145 status = "okay";
0146
0147 phy-mode = "rgmii";
0148 phy-handle = <ðphy2>;
0149
0150 pinctrl-names = "default";
0151 pinctrl-0 = <&pinctrl_rgmii3_default>;
0152 };
0153
0154 &mac3 {
0155 status = "okay";
0156
0157 phy-mode = "rgmii";
0158 phy-handle = <ðphy3>;
0159
0160 pinctrl-names = "default";
0161 pinctrl-0 = <&pinctrl_rgmii4_default>;
0162 };
0163
0164 &emmc_controller {
0165 status = "okay";
0166 };
0167
0168 &emmc {
0169 non-removable;
0170 bus-width = <4>;
0171 max-frequency = <100000000>;
0172 clk-phase-mmc-hs200 = <9>, <225>;
0173 };
0174
0175 &rtc {
0176 status = "okay";
0177 };
0178
0179 &fmc {
0180 status = "okay";
0181 flash@0 {
0182 status = "okay";
0183 m25p,fast-read;
0184 label = "bmc";
0185 spi-max-frequency = <50000000>;
0186 #include "openbmc-flash-layout-64.dtsi"
0187 };
0188 };
0189
0190 &spi1 {
0191 status = "okay";
0192 pinctrl-names = "default";
0193 pinctrl-0 = <&pinctrl_spi1_default>;
0194
0195 flash@0 {
0196 status = "okay";
0197 m25p,fast-read;
0198 label = "pnor";
0199 spi-max-frequency = <100000000>;
0200 };
0201 };
0202
0203 &uart5 {
0204 // Workaround for A0
0205 compatible = "snps,dw-apb-uart";
0206 };
0207
0208 &i2c0 {
0209 status = "okay";
0210
0211 temp@2e {
0212 compatible = "adi,adt7490";
0213 reg = <0x2e>;
0214 };
0215 };
0216
0217 &i2c1 {
0218 status = "okay";
0219 };
0220
0221 &i2c2 {
0222 status = "okay";
0223 };
0224
0225 &i2c3 {
0226 status = "okay";
0227 };
0228
0229 &i2c4 {
0230 status = "okay";
0231 };
0232
0233 &i2c5 {
0234 status = "okay";
0235 };
0236
0237 &i2c6 {
0238 status = "okay";
0239 };
0240
0241 &i2c7 {
0242 status = "okay";
0243 };
0244
0245 &i2c8 {
0246 status = "okay";
0247 };
0248
0249 &i2c9 {
0250 status = "okay";
0251 };
0252
0253 &i2c12 {
0254 status = "okay";
0255 };
0256
0257 &i2c13 {
0258 status = "okay";
0259 };
0260
0261 &i2c14 {
0262 status = "okay";
0263 };
0264
0265 &i2c15 {
0266 status = "okay";
0267 };
0268
0269 &fsim0 {
0270 status = "okay";
0271 };
0272
0273 &ehci1 {
0274 status = "okay";
0275 };
0276
0277 &uhci {
0278 status = "okay";
0279 };
0280
0281 &sdc {
0282 status = "okay";
0283 };
0284
0285 /*
0286 * The signal voltage of sdhci0 and sdhci1 on AST2600-A2 EVB is able to be
0287 * toggled by GPIO pins.
0288 * In the reference design, GPIOV0 of AST2600-A2 EVB is connected to the
0289 * power load switch that provides 3.3v to sdhci0 vdd, GPIOV1 is connected to
0290 * a 1.8v and a 3.3v power load switch that provides signal voltage to
0291 * sdhci0 bus.
0292 * If GPIOV0 is active high, sdhci0 is enabled, otherwise, sdhci0 is disabled.
0293 * If GPIOV1 is active high, 3.3v power load switch is enabled, sdhci0 signal
0294 * voltage is 3.3v, otherwise, 1.8v power load switch will be enabled,
0295 * sdhci0 signal voltage becomes 1.8v.
0296 * AST2600-A2 EVB also supports toggling signal voltage for sdhci1.
0297 * The design is the same as sdhci0, it uses GPIOV2 as power-gpio and GPIOV3
0298 * as power-switch-gpio.
0299 */
0300 &sdhci0 {
0301 status = "okay";
0302 bus-width = <4>;
0303 max-frequency = <100000000>;
0304 sdhci-drive-type = /bits/ 8 <3>;
0305 sdhci-caps-mask = <0x7 0x0>;
0306 sdhci,wp-inverted;
0307 vmmc-supply = <&vcc_sdhci0>;
0308 vqmmc-supply = <&vccq_sdhci0>;
0309 clk-phase-sd-hs = <7>, <200>;
0310 };
0311
0312 &sdhci1 {
0313 status = "okay";
0314 bus-width = <4>;
0315 max-frequency = <100000000>;
0316 sdhci-drive-type = /bits/ 8 <3>;
0317 sdhci-caps-mask = <0x7 0x0>;
0318 sdhci,wp-inverted;
0319 vmmc-supply = <&vcc_sdhci1>;
0320 vqmmc-supply = <&vccq_sdhci1>;
0321 clk-phase-sd-hs = <7>, <200>;
0322 };
0323
0324 &vhub {
0325 status = "okay";
0326 pinctrl-names = "default";
0327 };
0328
0329 &video {
0330 status = "okay";
0331 memory-region = <&video_engine_memory>;
0332 };
0333
0334 &gfx {
0335 status = "okay";
0336 memory-region = <&gfx_memory>;
0337 };