0001 /*
0002 * Device Tree Source for the Axis ARTPEC-6 SoC
0003 *
0004 * This file is dual-licensed: you can use it either under the terms
0005 * of the GPL or the X11 license, at your option. Note that this dual
0006 * licensing only applies to this file, and not this project as a
0007 * whole.
0008 *
0009 * a) This file is free software; you can redistribute it and/or
0010 * modify it under the terms of the GNU General Public License as
0011 * published by the Free Software Foundation; either version 2 of the
0012 * License, or (at your option) any later version.
0013 *
0014 * This file is distributed in the hope that it will be useful,
0015 * but WITHOUT ANY WARRANTY; without even the implied warranty of
0016 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
0017 * GNU General Public License for more details.
0018 *
0019 * Or, alternatively,
0020 *
0021 * b) Permission is hereby granted, free of charge, to any person
0022 * obtaining a copy of this software and associated documentation
0023 * files (the "Software"), to deal in the Software without
0024 * restriction, including without limitation the rights to use,
0025 * copy, modify, merge, publish, distribute, sublicense, and/or
0026 * sell copies of the Software, and to permit persons to whom the
0027 * Software is furnished to do so, subject to the following
0028 * conditions:
0029 *
0030 * The above copyright notice and this permission notice shall be
0031 * included in all copies or substantial portions of the Software.
0032 *
0033 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0034 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
0035 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
0036 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
0037 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
0038 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
0039 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0040 * OTHER DEALINGS IN THE SOFTWARE.
0041 */
0042
0043 #include <dt-bindings/interrupt-controller/arm-gic.h>
0044 #include <dt-bindings/dma/nbpfaxi.h>
0045 #include <dt-bindings/clock/axis,artpec6-clkctrl.h>
0046
0047 / {
0048 #address-cells = <1>;
0049 #size-cells = <1>;
0050 compatible = "axis,artpec6";
0051 interrupt-parent = <&intc>;
0052
0053 cpus {
0054 #address-cells = <1>;
0055 #size-cells = <0>;
0056
0057 cpu0: cpu@0 {
0058 device_type = "cpu";
0059 compatible = "arm,cortex-a9";
0060 reg = <0>;
0061 next-level-cache = <&pl310>;
0062 };
0063
0064 cpu1: cpu@1 {
0065 device_type = "cpu";
0066 compatible = "arm,cortex-a9";
0067 reg = <1>;
0068 next-level-cache = <&pl310>;
0069 };
0070 };
0071
0072 syscon: syscon@f8000000 {
0073 compatible = "axis,artpec6-syscon", "syscon";
0074 reg = <0xf8000000 0x48>;
0075 };
0076
0077 psci {
0078 compatible = "arm,psci-0.2", "arm,psci";
0079 method = "smc";
0080 psci_version = <0x84000000>;
0081 cpu_on = <0x84000003>;
0082 system_reset = <0x84000009>;
0083 };
0084
0085 scu@faf00000 {
0086 compatible = "arm,cortex-a9-scu";
0087 reg = <0xfaf00000 0x58>;
0088 };
0089
0090 /* Main external clock driving CPU and peripherals */
0091 ext_clk: ext_clk {
0092 #clock-cells = <0>;
0093 compatible = "fixed-clock";
0094 clock-frequency = <50000000>;
0095 };
0096
0097 eth_phy_ref_clk: eth_phy_ref_clk {
0098 #clock-cells = <0>;
0099 compatible = "fixed-clock";
0100 clock-frequency = <125000000>;
0101 };
0102
0103 clkctrl: clkctrl@f8000000 {
0104 #clock-cells = <1>;
0105 compatible = "axis,artpec6-clkctrl";
0106 reg = <0xf8000000 0x48>;
0107 clocks = <&ext_clk>;
0108 clock-names = "sys_refclk";
0109 };
0110
0111 gtimer@faf00200 {
0112 compatible = "arm,cortex-a9-global-timer";
0113 reg = <0xfaf00200 0x20>;
0114 interrupts = <GIC_PPI 11 0xf01>;
0115 clocks = <&clkctrl ARTPEC6_CLK_CPU_PERIPH>;
0116 };
0117
0118 timer@faf00600 {
0119 compatible = "arm,cortex-a9-twd-timer";
0120 reg = <0xfaf00600 0x20>;
0121 interrupts = <GIC_PPI 13 0xf04>;
0122 clocks = <&clkctrl ARTPEC6_CLK_CPU_PERIPH>;
0123 status = "disabled";
0124 };
0125
0126 intc: interrupt-controller@faf01000 {
0127 interrupt-controller;
0128 compatible = "arm,cortex-a9-gic";
0129 #interrupt-cells = <3>;
0130 reg = < 0xfaf01000 0x1000 >, < 0xfaf00100 0x0100 >;
0131 };
0132
0133 pl310: cache-controller@faf10000 {
0134 compatible = "arm,pl310-cache";
0135 cache-unified;
0136 cache-level = <2>;
0137 reg = <0xfaf10000 0x1000>;
0138 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
0139 arm,data-latency = <1 1 1>;
0140 arm,tag-latency = <1 1 1>;
0141 arm,filter-ranges = <0x0 0x80000000>;
0142 arm,double-linefill = <1>;
0143 arm,double-linefill-incr = <0>;
0144 arm,double-linefill-wrap = <0>;
0145 prefetch-data = <1>;
0146 prefetch-instr = <1>;
0147 arm,prefetch-offset = <0>;
0148 arm,prefetch-drop = <1>;
0149 };
0150
0151 pmu {
0152 compatible = "arm,cortex-a9-pmu";
0153 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
0154 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
0155 interrupt-affinity = <&cpu0>, <&cpu1>;
0156 };
0157
0158 /*
0159 * Both pci nodes cannot be enabled at the same time,
0160 * leave the unwanted node as disabled.
0161 */
0162 pcie: pcie@f8050000 {
0163 compatible = "axis,artpec6-pcie", "snps,dw-pcie";
0164 reg = <0xf8050000 0x2000
0165 0xf8040000 0x1000
0166 0xc0000000 0x2000>;
0167 reg-names = "dbi", "phy", "config";
0168 #address-cells = <3>;
0169 #size-cells = <2>;
0170 device_type = "pci";
0171 /* downstream I/O */
0172 ranges = <0x81000000 0 0 0xc0002000 0 0x00010000
0173 /* non-prefetchable memory */
0174 0x82000000 0 0xc0012000 0xc0012000 0 0x1ffee000>;
0175 num-lanes = <2>;
0176 bus-range = <0x00 0xff>;
0177 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
0178 interrupt-names = "msi";
0179 #interrupt-cells = <1>;
0180 interrupt-map-mask = <0 0 0 0x7>;
0181 interrupt-map = <0 0 0 1 &intc GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
0182 <0 0 0 2 &intc GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
0183 <0 0 0 3 &intc GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
0184 <0 0 0 4 &intc GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
0185 axis,syscon-pcie = <&syscon>;
0186 status = "disabled";
0187 };
0188
0189 pcie_ep: pcie_ep@f8050000 {
0190 compatible = "axis,artpec6-pcie-ep", "snps,dw-pcie";
0191 reg = <0xf8050000 0x2000
0192 0xf8051000 0x2000
0193 0xf8040000 0x1000
0194 0xc0000000 0x20000000>;
0195 reg-names = "dbi", "dbi2", "phy", "addr_space";
0196 num-ib-windows = <6>;
0197 num-ob-windows = <2>;
0198 num-lanes = <2>;
0199 axis,syscon-pcie = <&syscon>;
0200 status = "disabled";
0201 };
0202
0203 pinctrl: pinctrl@f801d000 {
0204 compatible = "axis,artpec6-pinctrl";
0205 reg = <0xf801d000 0x400>;
0206
0207 pinctrl_uart0: uart0grp {
0208 function = "uart0";
0209 groups = "uart0grp2";
0210 bias-pull-up;
0211 };
0212 pinctrl_uart1: uart1grp {
0213 function = "uart1";
0214 groups = "uart1grp0";
0215 bias-pull-up;
0216 };
0217 pinctrl_uart2: uart2grp {
0218 function = "uart2";
0219 groups = "uart2grp1";
0220 bias-pull-up;
0221 };
0222 pinctrl_uart3: uart3grp {
0223 function = "uart3";
0224 groups = "uart3grp0";
0225 bias-pull-up;
0226 };
0227 };
0228
0229 amba@0 {
0230 compatible = "simple-bus";
0231 #address-cells = <0x1>;
0232 #size-cells = <0x1>;
0233 ranges;
0234 dma-ranges;
0235
0236 crypto@f4264000 {
0237 compatible = "axis,artpec6-crypto";
0238 reg = <0xf4264000 0x4000>;
0239 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
0240 };
0241
0242 dma0: dma@f8019000 {
0243 compatible = "renesas,nbpfaxi64dmac8b16";
0244 reg = <0xf8019000 0x400>;
0245 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, /* error */
0246 <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
0247 <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
0248 <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
0249 <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
0250 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
0251 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
0252 <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
0253 <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
0254 interrupt-names = "error",
0255 "ch0", "ch1", "ch2", "ch3",
0256 "ch4", "ch5", "ch6", "ch7",
0257 "ch8", "ch9", "ch10", "ch12",
0258 "ch12", "ch13", "ch14", "ch15";
0259 clocks = <&clkctrl ARTPEC6_CLK_DMA_ACLK>;
0260 #dma-cells = <2>;
0261 dma-channels = <8>;
0262 dma-requests = <8>;
0263 };
0264 dma1: dma@f8019400 {
0265 compatible = "renesas,nbpfaxi64dmac8b16";
0266 reg = <0xf8019400 0x400>;
0267 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, /* error */
0268 <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
0269 <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
0270 <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
0271 <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
0272 <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
0273 <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
0274 <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
0275 <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
0276 interrupt-names = "error",
0277 "ch0", "ch1", "ch2", "ch3",
0278 "ch4", "ch5", "ch6", "ch7",
0279 "ch8", "ch9", "ch10", "ch12",
0280 "ch12", "ch13", "ch14", "ch15";
0281 clocks = <&clkctrl ARTPEC6_CLK_DMA_ACLK>;
0282 #dma-cells = <2>;
0283 dma-channels = <8>;
0284 dma-requests = <8>;
0285 };
0286
0287 ethernet: ethernet@f8010000 {
0288 clock-names = "stmmaceth", "ptp_ref";
0289 clocks = <&clkctrl ARTPEC6_CLK_ETH_ACLK>,
0290 <&clkctrl ARTPEC6_CLK_PTP_REF>;
0291 compatible = "snps,dwmac-4.10a", "snps,dwmac";
0292 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
0293 <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
0294 interrupt-names = "macirq", "eth_lpi";
0295 reg = <0xf8010000 0x4000>;
0296
0297 snps,axi-config = <&stmmac_axi_setup>;
0298 snps,mtl-rx-config = <&mtl_rx_setup>;
0299 snps,mtl-tx-config = <&mtl_tx_setup>;
0300
0301 snps,txpbl = <8>;
0302 snps,rxpbl = <2>;
0303 snps,aal;
0304 snps,tso;
0305
0306 status = "disabled";
0307
0308 stmmac_axi_setup: stmmac-axi-config {
0309 snps,wr_osr_lmt = <1>;
0310 snps,rd_osr_lmt = <15>;
0311 /* If FB is disabled, the AXI master chooses
0312 * a burst length of any value less than the
0313 * maximum enabled burst length
0314 * (all lesser burst length enables are redundant).
0315 */
0316 snps,blen = <0 0 0 0 16 0 0>;
0317 };
0318
0319 mtl_rx_setup: rx-queues-config {
0320 snps,rx-queues-to-use = <1>;
0321 queue0 {};
0322 };
0323
0324 mtl_tx_setup: tx-queues-config {
0325 snps,tx-queues-to-use = <2>;
0326 queue0 {};
0327 queue1 {};
0328 };
0329 };
0330
0331 uart0: serial@f8036000 {
0332 compatible = "arm,pl011", "arm,primecell";
0333 reg = <0xf8036000 0x1000>;
0334 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
0335 clocks = <&clkctrl ARTPEC6_CLK_UART_REFCLK>,
0336 <&clkctrl ARTPEC6_CLK_UART_PCLK>;
0337 clock-names = "uart_clk", "apb_pclk";
0338 pinctrl-names = "default";
0339 pinctrl-0 = <&pinctrl_uart0>;
0340 dmas = <&dma0 4 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>,
0341 <&dma0 5 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>;
0342 dma-names = "rx", "tx";
0343 status = "disabled";
0344 };
0345 uart1: serial@f8037000 {
0346 compatible = "arm,pl011", "arm,primecell";
0347 reg = <0xf8037000 0x1000>;
0348 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
0349 clocks = <&clkctrl ARTPEC6_CLK_UART_REFCLK>,
0350 <&clkctrl ARTPEC6_CLK_UART_PCLK>;
0351 clock-names = "uart_clk", "apb_pclk";
0352 pinctrl-names = "default";
0353 pinctrl-0 = <&pinctrl_uart1>;
0354 dmas = <&dma0 6 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>,
0355 <&dma0 7 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>;
0356 dma-names = "rx", "tx";
0357 status = "disabled";
0358 };
0359 uart2: serial@f8038000 {
0360 compatible = "arm,pl011", "arm,primecell";
0361 reg = <0xf8038000 0x1000>;
0362 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
0363 clocks = <&clkctrl ARTPEC6_CLK_UART_REFCLK>,
0364 <&clkctrl ARTPEC6_CLK_UART_PCLK>;
0365 clock-names = "uart_clk", "apb_pclk";
0366 pinctrl-names = "default";
0367 pinctrl-0 = <&pinctrl_uart2>;
0368 dmas = <&dma1 0 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>,
0369 <&dma1 1 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>;
0370 dma-names = "rx", "tx";
0371 status = "disabled";
0372 };
0373 uart3: serial@f8039000 {
0374 compatible = "arm,pl011", "arm,primecell";
0375 reg = <0xf8039000 0x1000>;
0376 interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
0377 clocks = <&clkctrl ARTPEC6_CLK_UART_REFCLK>,
0378 <&clkctrl ARTPEC6_CLK_UART_PCLK>;
0379 clock-names = "uart_clk", "apb_pclk";
0380 pinctrl-names = "default";
0381 pinctrl-0 = <&pinctrl_uart3>;
0382 dmas = <&dma1 2 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>,
0383 <&dma1 3 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>;
0384 dma-names = "rx", "tx";
0385 status = "disabled";
0386 };
0387 };
0388 };
