boot/dts/armada-xp-db-xc3-24g4xg.dts

0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003  * Device Tree file for DB-XC3-24G4XG board
0004  *
0005  * Copyright (C) 2016 Allied Telesis Labs
0006  *
0007  * Based on armada-xp-db.dts
0008  *
0009  * Note: this Device Tree assumes that the bootloader has remapped the
0010  * internal registers to 0xf1000000 (instead of the default
0011  * 0xd0000000). The 0xf1000000 is the default used by the recent,
0012  * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
0013  * boards were delivered with an older version of the bootloader that
0014  * left internal registers mapped at 0xd0000000. If you are in this
0015  * situation, you should either update your bootloader (preferred
0016  * solution) or the below Device Tree should be adjusted.
0017  */
0018
0019 /dts-v1/;
0020 #include "armada-xp-98dx3336.dtsi"
0021
0022 / {
0023         model = "DB-XC3-24G4XG";
0024         compatible = "marvell,db-xc3-24g4xg", "marvell,armadaxp-98dx3336", "marvell,armada-370-xp";
0025
0026         chosen {
0027                 bootargs = "console=ttyS0,115200 earlyprintk";
0028         };
0029
0030         memory {
0031                 device_type = "memory";
0032                 reg = <0 0x00000000 0 0x40000000>; /* 1 GB */
0033         };
0034 };
0035
0036 &L2 {
0037         arm,parity-enable;
0038         marvell,ecc-enable;
0039 };
0040
0041 &devbus_bootcs {
0042         status = "okay";
0043
0044         /* Device Bus parameters are required */
0045
0046         /* Read parameters */
0047         devbus,bus-width    = <16>;
0048         devbus,turn-off-ps  = <60000>;
0049         devbus,badr-skew-ps = <0>;
0050         devbus,acc-first-ps = <124000>;
0051         devbus,acc-next-ps  = <248000>;
0052         devbus,rd-setup-ps  = <0>;
0053         devbus,rd-hold-ps   = <0>;
0054
0055         /* Write parameters */
0056         devbus,sync-enable = <0>;
0057         devbus,wr-high-ps  = <60000>;
0058         devbus,wr-low-ps   = <60000>;
0059         devbus,ale-wr-ps   = <60000>;
0060 };
0061
0062 &uart0 {
0063         status = "okay";
0064 };
0065
0066 &uart1 {
0067         status = "okay";
0068 };
0069
0070 &i2c0 {
0071         clock-frequency = <100000>;
0072         status = "okay";
0073 };
0074
0075 &nand_controller {
0076         status = "okay";
0077
0078         nand@0 {
0079                 reg = <0>;
0080                 label = "pxa3xx_nand-0";
0081                 nand-rb = <0>;
0082                 marvell,nand-keep-config;
0083                 nand-on-flash-bbt;
0084                 nand-ecc-strength = <4>;
0085                 nand-ecc-step-size = <512>;
0086         };
0087 };
0088
0089 &spi0 {
0090         status = "okay";
0091
0092         flash@0 {
0093                 #address-cells = <1>;
0094                 #size-cells = <1>;
0095                 compatible = "m25p64";
0096                 reg = <0>; /* Chip select 0 */
0097                 spi-max-frequency = <20000000>;
0098                 m25p,fast-read;
0099
0100                 partition@u-boot {
0101                         reg = <0x00000000 0x00100000>;
0102                         label = "u-boot";
0103                 };
0104                 partition@u-boot-env {
0105                         reg = <0x00100000 0x00040000>;
0106                         label = "u-boot-env";
0107                 };
0108                 partition@unused {
0109                         reg = <0x00140000 0x00ec0000>;
0110                         label = "unused";
0111                 };
0112
0113         };
0114 };