boot/dts/armada-xp-db-dxbc2.dts

0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003  * Device Tree file for DB-DXBC2 board
0004  *
0005  * Copyright (C) 2016 Allied Telesis Labs
0006  *
0007  * Based on armada-xp-db.dts
0008  *
0009  * Note: this Device Tree assumes that the bootloader has remapped the
0010  * internal registers to 0xf1000000 (instead of the default
0011  * 0xd0000000). The 0xf1000000 is the default used by the recent,
0012  * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
0013  * boards were delivered with an older version of the bootloader that
0014  * left internal registers mapped at 0xd0000000. If you are in this
0015  * situation, you should either update your bootloader (preferred
0016  * solution) or the below Device Tree should be adjusted.
0017  */
0018
0019 /dts-v1/;
0020 #include "armada-xp-98dx4251.dtsi"
0021
0022 / {
0023         model = "Marvell Bobcat2 Evaluation Board";
0024         compatible = "marvell,db-dxbc2", "marvell,armadaxp-98dx4251", "marvell,armada-370-xp";
0025
0026         chosen {
0027                 bootargs = "console=ttyS0,115200 earlyprintk";
0028         };
0029
0030         memory {
0031                 device_type = "memory";
0032                 reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
0033         };
0034
0035 };
0036
0037 &devbus_bootcs {
0038         status = "okay";
0039
0040         /* Device Bus parameters are required */
0041
0042         /* Read parameters */
0043         devbus,bus-width    = <16>;
0044         devbus,turn-off-ps  = <60000>;
0045         devbus,badr-skew-ps = <0>;
0046         devbus,acc-first-ps = <124000>;
0047         devbus,acc-next-ps  = <248000>;
0048         devbus,rd-setup-ps  = <0>;
0049         devbus,rd-hold-ps   = <0>;
0050
0051         /* Write parameters */
0052         devbus,sync-enable = <0>;
0053         devbus,wr-high-ps  = <60000>;
0054         devbus,wr-low-ps   = <60000>;
0055         devbus,ale-wr-ps   = <60000>;
0056 };
0057
0058 &i2c0 {
0059         clock-frequency = <100000>;
0060         status = "okay";
0061 };
0062
0063 &uart0 {
0064         status = "okay";
0065 };
0066
0067 &uart1 {
0068         status = "okay";
0069 };
0070
0071 &nand_controller {
0072         status = "okay";
0073
0074         nand@0 {
0075                 reg = <0>;
0076                 label = "pxa3xx_nand-0";
0077                 nand-rb = <0>;
0078                 marvell,nand-keep-config;
0079                 nand-on-flash-bbt;
0080                 nand-ecc-strength = <4>;
0081                 nand-ecc-step-size = <512>;
0082         };
0083 };
0084
0085 &sdio {
0086         pinctrl-0 = <&sdio_pins>;
0087         pinctrl-names = "default";
0088         status = "okay";
0089         /* No CD or WP GPIOs */
0090         broken-cd;
0091 };
0092
0093 &spi0 {
0094         status = "okay";
0095
0096         flash@0 {
0097                 #address-cells = <1>;
0098                 #size-cells = <1>;
0099                 compatible = "m25p64";
0100                 reg = <0>; /* Chip select 0 */
0101                 spi-max-frequency = <20000000>;
0102                 m25p,fast-read;
0103
0104                 partition@u-boot {
0105                         reg = <0x00000000 0x00100000>;
0106                         label = "u-boot";
0107                 };
0108                 partition@u-boot-env {
0109                         reg = <0x00100000 0x00040000>;
0110                         label = "u-boot-env";
0111                 };
0112                 partition@unused {
0113                         reg = <0x00140000 0x00ec0000>;
0114                         label = "unused";
0115                 };
0116
0117         };
0118 };