0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Device Tree file for CRS328-4C-20S-4S+ board
0004 *
0005 * Copyright (C) 2016 Allied Telesis Labs
0006 * Copyright (C) 2020 Sartura Ltd.
0007 *
0008 * Based on armada-xp-db.dts
0009 *
0010 * Note: this Device Tree assumes that the bootloader has remapped the
0011 * internal registers to 0xf1000000 (instead of the default
0012 * 0xd0000000). The 0xf1000000 is the default used by the recent,
0013 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
0014 * boards were delivered with an older version of the bootloader that
0015 * left internal registers mapped at 0xd0000000. If you are in this
0016 * situation, you should either update your bootloader (preferred
0017 * solution) or the below Device Tree should be adjusted.
0018 */
0019
0020 /dts-v1/;
0021 #include "armada-xp-98dx3236.dtsi"
0022
0023 / {
0024 model = "CRS328-4C-20S-4S+";
0025 compatible = "mikrotik,crs328-4c-20s-4s", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
0026
0027 chosen {
0028 bootargs = "console=ttyS0,115200 earlyprintk";
0029 };
0030
0031 memory {
0032 device_type = "memory";
0033 reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
0034 };
0035 };
0036
0037 &L2 {
0038 arm,parity-enable;
0039 marvell,ecc-enable;
0040 };
0041
0042 &devbus_bootcs {
0043 status = "okay";
0044
0045 /* Device Bus parameters are required */
0046
0047 /* Read parameters */
0048 devbus,bus-width = <16>;
0049 devbus,turn-off-ps = <60000>;
0050 devbus,badr-skew-ps = <0>;
0051 devbus,acc-first-ps = <124000>;
0052 devbus,acc-next-ps = <248000>;
0053 devbus,rd-setup-ps = <0>;
0054 devbus,rd-hold-ps = <0>;
0055
0056 /* Write parameters */
0057 devbus,sync-enable = <0>;
0058 devbus,wr-high-ps = <60000>;
0059 devbus,wr-low-ps = <60000>;
0060 devbus,ale-wr-ps = <60000>;
0061 };
0062
0063 &uart0 {
0064 status = "okay";
0065 };
0066
0067 &uart1 {
0068 status = "okay";
0069 };
0070
0071 &i2c0 {
0072 clock-frequency = <100000>;
0073 status = "okay";
0074 };
0075
0076 &usb0 {
0077 status = "okay";
0078 };
0079
0080 &spi0 {
0081 status = "okay";
0082
0083 flash@0 {
0084 #address-cells = <1>;
0085 #size-cells = <1>;
0086 compatible = "jedec,spi-nor";
0087 reg = <0>; /* Chip select 0 */
0088 spi-max-frequency = <108000000>;
0089 m25p,fast-read;
0090
0091 partition@u-boot {
0092 reg = <0x00000000 0x001f0000>;
0093 label = "u-boot";
0094 };
0095 partition@u-boot-env {
0096 reg = <0x001f0000 0x00010000>;
0097 label = "u-boot-env";
0098 };
0099 partition@ubi1 {
0100 reg = <0x00200000 0x00e00000>;
0101 label = "ubi1";
0102 };
0103 };
0104 };
