boot/dts/armada-xp-axpwifiap.dts

0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003  * Device Tree file for Marvell RD-AXPWiFiAP.
0004  *
0005  * Note: this board is shipped with a new generation boot loader that
0006  * remaps internal registers at 0xf1000000. Therefore, if earlyprintk
0007  * is used, the CONFIG_DEBUG_MVEBU_UART0_ALTERNATE option or the
0008  * CONFIG_DEBUG_MVEBU_UART1_ALTERNATE option should be used.
0009  *
0010  * Copyright (C) 2013 Marvell
0011  *
0012  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
0013  */
0014
0015 /dts-v1/;
0016 #include <dt-bindings/gpio/gpio.h>
0017 #include <dt-bindings/input/input.h>
0018 #include "armada-xp-mv78230.dtsi"
0019
0020 / {
0021         model = "Marvell RD-AXPWiFiAP";
0022         compatible = "marvell,rd-axpwifiap", "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
0023
0024         chosen {
0025                 stdout-path = "serial0:115200n8";
0026         };
0027
0028         memory@0 {
0029                 device_type = "memory";
0030                 reg = <0x00000000 0x00000000 0x00000000 0x40000000>; /* 1GB */
0031         };
0032
0033         soc {
0034                 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
0035                           MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
0036                           MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
0037                           MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
0038
0039                 internal-regs {
0040                         /* UART0 */
0041                         serial@12000 {
0042                                 status = "okay";
0043                         };
0044
0045                         /* UART1 */
0046                         serial@12100 {
0047                                 status = "okay";
0048                         };
0049
0050                         sata@a0000 {
0051                                 nr-ports = <1>;
0052                                 status = "okay";
0053                         };
0054
0055                         ethernet@70000 {
0056                                 pinctrl-0 = <&ge0_rgmii_pins>;
0057                                 pinctrl-names = "default";
0058                                 status = "okay";
0059                                 phy = <&phy0>;
0060                                 phy-mode = "rgmii-id";
0061                         };
0062                         ethernet@74000 {
0063                                 pinctrl-0 = <&ge1_rgmii_pins>;
0064                                 pinctrl-names = "default";
0065                                 status = "okay";
0066                                 phy = <&phy1>;
0067                                 phy-mode = "rgmii-id";
0068                         };
0069                 };
0070         };
0071
0072         gpio-keys {
0073                 compatible = "gpio-keys";
0074                 pinctrl-0 = <&keys_pin>;
0075                 pinctrl-names = "default";
0076
0077                 button-reset {
0078                         label = "Factory Reset Button";
0079                         linux,code = <KEY_SETUP>;
0080                         gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
0081                 };
0082         };
0083 };
0084
0085 &mdio {
0086         phy0: ethernet-phy@0 {
0087                 reg = <0>;
0088         };
0089
0090         phy1: ethernet-phy@1 {
0091                 reg = <1>;
0092         };
0093 };
0094
0095 &pciec {
0096         status = "okay";
0097
0098         /* First mini-PCIe port */
0099         pcie@1,0 {
0100                 /* Port 0, Lane 0 */
0101                 status = "okay";
0102         };
0103
0104         /* Second mini-PCIe port */
0105         pcie@2,0 {
0106                 /* Port 0, Lane 1 */
0107                 status = "okay";
0108         };
0109
0110         /* Renesas uPD720202 USB 3.0 controller */
0111         pcie@3,0 {
0112                 /* Port 0, Lane 3 */
0113                 status = "okay";
0114         };
0115 };
0116
0117 &pinctrl {
0118         pinctrl-0 = <&phy_int_pin>;
0119         pinctrl-names = "default";
0120
0121         keys_pin: keys-pin {
0122                 marvell,pins = "mpp33";
0123                 marvell,function = "gpio";
0124         };
0125
0126         phy_int_pin: phy-int-pin {
0127                 marvell,pins = "mpp32";
0128                 marvell,function = "gpio";
0129         };
0130 };
0131
0132 &spi0 {
0133         status = "okay";
0134
0135         flash@0 {
0136                 #address-cells = <1>;
0137                 #size-cells = <1>;
0138                 compatible = "n25q128a13", "jedec,spi-nor";
0139                 reg = <0>; /* Chip select 0 */
0140                 spi-max-frequency = <108000000>;
0141         };
0142 };