0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Device Tree Include file for Marvell 98dx4521 family SoC
0004 *
0005 * Copyright (C) 2016 Allied Telesis Labs
0006 *
0007 * Contains definitions specific to the 98dx4521 SoC that are not
0008 * common to all Armada XP SoCs.
0009 */
0010
0011 #include "armada-xp-98dx3236.dtsi"
0012
0013 / {
0014 model = "Marvell 98DX4251 SoC";
0015 compatible = "marvell,armadaxp-98dx4251", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
0016
0017 cpus {
0018 cpu@1 {
0019 device_type = "cpu";
0020 compatible = "marvell,sheeva-v7";
0021 reg = <1>;
0022 clocks = <&cpuclk 1>;
0023 clock-latency = <1000000>;
0024 };
0025 };
0026
0027 soc {
0028 internal-regs {
0029 resume@20980 {
0030 compatible = "marvell,98dx3336-resume-ctrl";
0031 reg = <0x20980 0x10>;
0032 };
0033 };
0034 };
0035 };
0036
0037 &sdio {
0038 status = "okay";
0039 };
0040
0041 &pinctrl {
0042 compatible = "marvell,98dx4251-pinctrl";
0043
0044 sdio_pins: sdio-pins {
0045 marvell,pins = "mpp5", "mpp6", "mpp7",
0046 "mpp8", "mpp9", "mpp10";
0047 marvell,function = "sd0";
0048 };
0049 };
0050
0051 &pp0 {
0052 compatible = "marvell,prestera-98dx4251", "marvell,prestera";
0053 interrupts = <33>, <34>, <35>, <36>;
0054 };
