boot/dts/armada-388-clearfog.dtsi

0001 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
0002 /*
0003  * Device Tree include file for SolidRun Clearfog 88F6828 based boards
0004  *
0005  *  Copyright (C) 2015 Russell King
0006  */
0007
0008 #include "armada-388.dtsi"
0009 #include "armada-38x-solidrun-microsom.dtsi"
0010
0011 / {
0012         aliases {
0013                 /* So that mvebu u-boot can update the MAC addresses */
0014                 ethernet1 = &eth0;
0015                 ethernet2 = &eth1;
0016                 ethernet3 = &eth2;
0017         };
0018
0019         chosen {
0020                 stdout-path = "serial0:115200n8";
0021         };
0022
0023         reg_3p3v: regulator-3p3v {
0024                 compatible = "regulator-fixed";
0025                 regulator-name = "3P3V";
0026                 regulator-min-microvolt = <3300000>;
0027                 regulator-max-microvolt = <3300000>;
0028                 regulator-always-on;
0029         };
0030
0031         soc {
0032                 internal-regs {
0033                         sata@a8000 {
0034                                 /* pinctrl? */
0035                                 status = "okay";
0036                         };
0037
0038                         sata@e0000 {
0039                                 /* pinctrl? */
0040                                 status = "okay";
0041                         };
0042
0043                         sdhci@d8000 {
0044                                 bus-width = <4>;
0045                                 cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
0046                                 no-1-8-v;
0047                                 pinctrl-0 = <&microsom_sdhci_pins
0048                                              &clearfog_sdhci_cd_pins>;
0049                                 pinctrl-names = "default";
0050                                 status = "okay";
0051                                 vmmc-supply = <&reg_3p3v>;
0052                                 wp-inverted;
0053                         };
0054
0055                         usb@58000 {
0056                                 /* CON3, nearest  power. */
0057                                 status = "okay";
0058                         };
0059
0060                         usb3@f8000 {
0061                                 /* CON7 */
0062                                 status = "okay";
0063                         };
0064                 };
0065
0066                 pcie {
0067                         status = "okay";
0068                         /*
0069                          * The two PCIe units are accessible through
0070                          * the mini-PCIe connectors on the board.
0071                          */
0072                         pcie@2,0 {
0073                                 /* Port 1, Lane 0. CON3, nearest power. */
0074                                 reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
0075                                 status = "okay";
0076                         };
0077                 };
0078         };
0079
0080         sfp: sfp {
0081                 compatible = "sff,sfp";
0082                 i2c-bus = <&i2c1>;
0083                 los-gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
0084                 mod-def0-gpio = <&expander0 15 GPIO_ACTIVE_LOW>;
0085                 tx-disable-gpio = <&expander0 14 GPIO_ACTIVE_HIGH>;
0086                 tx-fault-gpio = <&expander0 13 GPIO_ACTIVE_HIGH>;
0087                 maximum-power-milliwatt = <2000>;
0088         };
0089 };
0090
0091 &eth1 {
0092         /* ethernet@30000 */
0093         bm,pool-long = <2>;
0094         bm,pool-short = <1>;
0095         buffer-manager = <&bm>;
0096         phys = <&comphy1 1>;
0097         phy-mode = "sgmii";
0098         status = "okay";
0099 };
0100
0101 &eth2 {
0102         /* ethernet@34000 */
0103         bm,pool-long = <3>;
0104         bm,pool-short = <1>;
0105         buffer-manager = <&bm>;
0106         managed = "in-band-status";
0107         phys = <&comphy5 2>;
0108         phy-mode = "sgmii";
0109         sfp = <&sfp>;
0110         status = "okay";
0111 };
0112
0113 &i2c0 {
0114         /*
0115          * PCA9655 GPIO expander, up to 1MHz clock.
0116          *  0-CON3 CLKREQ#
0117          *  1-CON3 PERST#
0118          *  2-
0119          *  3-CON3 W_DISABLE
0120          *  4-
0121          *  5-USB3 overcurrent
0122          *  6-USB3 power
0123          *  7-
0124          *  8-JP4 P1
0125          *  9-JP4 P4
0126          * 10-JP4 P5
0127          * 11-m.2 DEVSLP
0128          * 12-SFP_LOS
0129          * 13-SFP_TX_FAULT
0130          * 14-SFP_TX_DISABLE
0131          * 15-SFP_MOD_DEF0
0132          */
0133         expander0: gpio-expander@20 {
0134                 /*
0135                  * This is how it should be:
0136                  * compatible = "onnn,pca9655", "nxp,pca9555";
0137                  * but you can't do this because of the way I2C works.
0138                  */
0139                 compatible = "nxp,pca9555";
0140                 gpio-controller;
0141                 #gpio-cells = <2>;
0142                 reg = <0x20>;
0143
0144                 pcie1-0-clkreq-hog {
0145                         gpio-hog;
0146                         gpios = <0 GPIO_ACTIVE_LOW>;
0147                         input;
0148                         line-name = "pcie1.0-clkreq";
0149                 };
0150                 pcie1-0-w-disable-hog {
0151                         gpio-hog;
0152                         gpios = <3 GPIO_ACTIVE_LOW>;
0153                         output-low;
0154                         line-name = "pcie1.0-w-disable";
0155                 };
0156                 usb3-ilimit-hog {
0157                         gpio-hog;
0158                         gpios = <5 GPIO_ACTIVE_LOW>;
0159                         input;
0160                         line-name = "usb3-current-limit";
0161                 };
0162                 usb3-power-hog {
0163                         gpio-hog;
0164                         gpios = <6 GPIO_ACTIVE_HIGH>;
0165                         output-high;
0166                         line-name = "usb3-power";
0167                 };
0168                 m2-devslp-hog {
0169                         gpio-hog;
0170                         gpios = <11 GPIO_ACTIVE_HIGH>;
0171                         output-low;
0172                         line-name = "m.2 devslp";
0173                 };
0174         };
0175
0176         /* The MCP3021 supports standard and fast modes */
0177         mikrobus_adc: mcp3021@4c {
0178                 compatible = "microchip,mcp3021";
0179                 reg = <0x4c>;
0180         };
0181
0182         eeprom@52 {
0183                 compatible = "atmel,24c02";
0184                 reg = <0x52>;
0185                 pagesize = <16>;
0186         };
0187 };
0188
0189 &i2c1 {
0190         /*
0191          * Routed to SFP, mikrobus, and PCIe.
0192          * SFP limits this to 100kHz, and requires an AT24C01A/02/04 with
0193          *  address pins tied low, which takes addresses 0x50 and 0x51.
0194          * Mikrobus doesn't specify beyond an I2C bus being present.
0195          * PCIe uses ARP to assign addresses, or 0x63-0x64.
0196          */
0197         clock-frequency = <100000>;
0198         pinctrl-0 = <&clearfog_i2c1_pins>;
0199         pinctrl-names = "default";
0200         status = "okay";
0201 };
0202
0203 &pinctrl {
0204         clearfog_i2c1_pins: i2c1-pins {
0205                 /* SFP, PCIe, mSATA, mikrobus */
0206                 marvell,pins = "mpp26", "mpp27";
0207                 marvell,function = "i2c1";
0208         };
0209         clearfog_sdhci_cd_pins: clearfog-sdhci-cd-pins {
0210                 marvell,pins = "mpp20";
0211                 marvell,function = "gpio";
0212         };
0213         mikro_pins: mikro-pins {
0214                 /* int: mpp22 rst: mpp29 */
0215                 marvell,pins = "mpp22", "mpp29";
0216                 marvell,function = "gpio";
0217         };
0218         mikro_spi_pins: mikro-spi-pins {
0219                 marvell,pins = "mpp43";
0220                 marvell,function = "spi1";
0221         };
0222         mikro_uart_pins: mikro-uart-pins {
0223                 marvell,pins = "mpp24", "mpp25";
0224                 marvell,function = "ua1";
0225         };
0226 };
0227
0228 &spi1 {
0229         /*
0230          * Add SPI CS pins for clearfog:
0231          * CS0: W25Q32
0232          * CS1: PIC microcontroller (Pro models)
0233          * CS2: mikrobus
0234          */
0235         pinctrl-0 = <&spi1_pins &mikro_spi_pins>;
0236         pinctrl-names = "default";
0237         status = "okay";
0238 };
0239
0240 &uart1 {
0241         /* mikrobus uart */
0242         pinctrl-0 = <&mikro_uart_pins>;
0243         pinctrl-names = "default";
0244         status = "okay";
0245 };