boot/dts/armada-385-db-88f6820-amc.dts

0001 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
0002 /*
0003  * Device Tree file for Marvell Armada 385 AMC board
0004  * (DB-88F6820-AMC)
0005  *
0006  * Copyright (C) 2017 Allied Telesis Labs
0007  */
0008
0009 /dts-v1/;
0010 #include "armada-385.dtsi"
0011
0012 #include <dt-bindings/gpio/gpio.h>
0013
0014 / {
0015         model = "Marvell Armada 385 AMC";
0016         compatible = "marvell,a385-db-amc", "marvell,armada385", "marvell,armada380";
0017
0018         chosen {
0019                 stdout-path = "serial0:115200n8";
0020         };
0021
0022         aliases {
0023                 ethernet0 = &eth0;
0024                 ethernet1 = &eth1;
0025                 spi1 = &spi1;
0026         };
0027
0028         memory {
0029                 device_type = "memory";
0030                 reg = <0x00000000 0x80000000>; /* 2GB */
0031         };
0032
0033         soc {
0034                 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
0035                           MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
0036         };
0037 };
0038
0039 &i2c0 {
0040         pinctrl-names = "default";
0041         pinctrl-0 = <&i2c0_pins>;
0042         status = "okay";
0043 };
0044
0045 &uart0 {
0046         /*
0047          * Exported on the micro USB connector CON3
0048          * through an FTDI
0049          */
0050
0051         pinctrl-names = "default";
0052         pinctrl-0 = <&uart0_pins>;
0053         status = "okay";
0054 };
0055
0056
0057 &eth0 {
0058         pinctrl-names = "default";
0059         /*
0060          * The Reference Clock 0 is used to provide a
0061          * clock to the PHY
0062          */
0063         pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
0064         status = "okay";
0065         phy = <&phy0>;
0066         phy-mode = "rgmii-id";
0067 };
0068
0069 &eth2 {
0070         status = "okay";
0071         phy = <&phy1>;
0072         phy-mode = "sgmii";
0073 };
0074
0075 &usb0 {
0076         status = "okay";
0077 };
0078
0079
0080
0081 &mdio {
0082         pinctrl-names = "default";
0083         pinctrl-0 = <&mdio_pins>;
0084
0085         phy0: ethernet-phy@1 {
0086                 reg = <1>;
0087         };
0088
0089         phy1: ethernet-phy@0 {
0090                 reg = <0>;
0091         };
0092 };
0093
0094 &nand_controller {
0095         status = "okay";
0096
0097         nand@0 {
0098                 reg = <0>;
0099                 label = "pxa3xx_nand-0";
0100                 nand-rb = <0>;
0101                 nand-on-flash-bbt;
0102
0103                 partitions {
0104                         compatible = "fixed-partitions";
0105                         #address-cells = <1>;
0106                         #size-cells = <1>;
0107                         partition@0 {
0108                                 reg = <0x00000000 0x40000000>;
0109                                 label = "user";
0110                         };
0111                 };
0112         };
0113 };
0114
0115 &pciec {
0116         status = "okay";
0117 };
0118
0119 &pcie1 {
0120         /* Port 0, Lane 0 */
0121         status = "okay";
0122 };
0123
0124 &spi1 {
0125         pinctrl-names = "default";
0126         pinctrl-0 = <&spi1_pins>;
0127         status = "okay";
0128
0129         flash@0 {
0130                 #address-cells = <1>;
0131                 #size-cells = <1>;
0132                 compatible = "jedec,spi-nor";
0133                 reg = <0>; /* Chip select 0 */
0134                 spi-max-frequency = <50000000>;
0135                 m25p,fast-read;
0136
0137                 partitions {
0138                         compatible = "fixed-partitions";
0139                         #address-cells = <1>;
0140                         #size-cells = <1>;
0141                         partition@0 {
0142                                 reg = <0x00000000 0x00100000>;
0143                                 label = "u-boot";
0144                         };
0145                         partition@100000 {
0146                                 reg = <0x00100000 0x00040000>;
0147                                 label = "u-boot-env";
0148                         };
0149                 };
0150         };
0151 };
0152
0153 &refclk {
0154         clock-frequency = <20000000>;
0155 };