0001 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
0002 /*
0003 * Device Tree file for Armada 385 Allied Telesis x530/GS980MX Board.
0004 (x530/AT-GS980MX)
0005 *
0006 Copyright (C) 2020 Allied Telesis Labs
0007 */
0008
0009 /dts-v1/;
0010 #include "armada-385.dtsi"
0011
0012 #include <dt-bindings/gpio/gpio.h>
0013
0014 / {
0015 model = "x530/AT-GS980MX";
0016 compatible = "alliedtelesis,gs980mx", "alliedtelesis,x530", "marvell,armada385", "marvell,armada380";
0017
0018 chosen {
0019 stdout-path = "serial1:115200n8";
0020 };
0021
0022 memory {
0023 device_type = "memory";
0024 reg = <0x00000000 0x40000000>; /* 1GB */
0025 };
0026
0027 soc {
0028 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
0029 MBUS_ID(0x01, 0x3d) 0 0xf4800000 0x80000
0030 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
0031
0032 internal-regs {
0033 i2c0: i2c@11000 {
0034 pinctrl-names = "default";
0035 pinctrl-0 = <&i2c0_pins>;
0036 status = "okay";
0037 };
0038
0039 uart0: serial@12000 {
0040 pinctrl-names = "default";
0041 pinctrl-0 = <&uart0_pins>;
0042 status = "okay";
0043 };
0044 };
0045 };
0046 };
0047
0048 &pciec {
0049 status = "okay";
0050 };
0051
0052 &pcie1 {
0053 status = "okay";
0054 reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
0055 reset-delay-us = <400000>;
0056 };
0057
0058 &pcie2 {
0059 status = "okay";
0060 };
0061
0062 &devbus_cs1 {
0063 compatible = "marvell,mvebu-devbus";
0064 status = "okay";
0065
0066 devbus,bus-width = <8>;
0067 devbus,turn-off-ps = <60000>;
0068 devbus,badr-skew-ps = <0>;
0069 devbus,acc-first-ps = <124000>;
0070 devbus,acc-next-ps = <248000>;
0071 devbus,rd-setup-ps = <0>;
0072 devbus,rd-hold-ps = <0>;
0073
0074 /* Write parameters */
0075 devbus,sync-enable = <0>;
0076 devbus,wr-high-ps = <60000>;
0077 devbus,wr-low-ps = <60000>;
0078 devbus,ale-wr-ps = <60000>;
0079
0080 nvs@0 {
0081 status = "okay";
0082
0083 compatible = "mtd-ram";
0084 reg = <0 0x00080000>;
0085 bank-width = <1>;
0086 label = "nvs";
0087 };
0088 };
0089
0090 &pinctrl {
0091 i2c0_gpio_pins: i2c-gpio-pins-0 {
0092 marvell,pins = "mpp2", "mpp3";
0093 marvell,function = "gpio";
0094 };
0095 };
0096
0097 &i2c0 {
0098 clock-frequency = <100000>;
0099 status = "okay";
0100
0101 pinctrl-names = "default", "gpio";
0102 pinctrl-0 = <&i2c0_pins>;
0103 pinctrl-1 = <&i2c0_gpio_pins>;
0104 scl-gpio = <&gpio0 2 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
0105 sda-gpio = <&gpio0 3 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
0106
0107 i2c0mux: mux@71 {
0108 #address-cells = <1>;
0109 #size-cells = <0>;
0110 compatible = "nxp,pca9544";
0111 reg = <0x71>;
0112 i2c-mux-idle-disconnect;
0113
0114 i2c@0 { /* POE devices MUX */
0115 #address-cells = <1>;
0116 #size-cells = <0>;
0117 reg = <0>;
0118 };
0119
0120 i2c@1 {
0121 #address-cells = <1>;
0122 #size-cells = <0>;
0123 reg = <1>;
0124
0125 adt7476_2e: hwmon@2e {
0126 compatible = "adi,adt7476";
0127 reg = <0x2e>;
0128 };
0129
0130 adt7476_2d: hwmon@2d {
0131 compatible = "adi,adt7476";
0132 reg = <0x2d>;
0133 };
0134 };
0135
0136 i2c@2 {
0137 #address-cells = <1>;
0138 #size-cells = <0>;
0139 reg = <2>;
0140
0141 rtc@68 {
0142 compatible = "dallas,ds1340";
0143 reg = <0x68>;
0144 };
0145 };
0146
0147 i2c@3 {
0148 #address-cells = <1>;
0149 #size-cells = <0>;
0150 reg = <3>;
0151
0152 gpio@20 {
0153 compatible = "nxp,pca9554";
0154 gpio-controller;
0155 #gpio-cells = <2>;
0156 reg = <0x20>;
0157 };
0158 };
0159 };
0160 };
0161
0162 &usb0 {
0163 status = "okay";
0164 };
0165
0166 &spi1 {
0167 pinctrl-names = "default";
0168 pinctrl-0 = <&spi1_pins>;
0169 status = "okay";
0170
0171 flash@1 {
0172 #address-cells = <1>;
0173 #size-cells = <1>;
0174 compatible = "jedec,spi-nor";
0175 reg = <1>; /* Chip select 1 */
0176 spi-max-frequency = <54000000>;
0177
0178 partitions {
0179 compatible = "fixed-partitions";
0180 #address-cells = <1>;
0181 #size-cells = <1>;
0182 partition@u-boot {
0183 reg = <0x00000000 0x00100000>;
0184 label = "u-boot";
0185 };
0186 partition@u-boot-env {
0187 reg = <0x00100000 0x00040000>;
0188 label = "u-boot-env";
0189 };
0190 partition@unused {
0191 reg = <0x00140000 0x00e80000>;
0192 label = "unused";
0193 };
0194 partition@idprom {
0195 reg = <0x00fc0000 0x00040000>;
0196 label = "idprom";
0197 };
0198 };
0199 };
0200 };
0201
0202 &nand_controller {
0203 status = "okay";
0204
0205 nand@0 {
0206 reg = <0>;
0207 label = "pxa3xx_nand-0";
0208 nand-rb = <0>;
0209 nand-on-flash-bbt;
0210 nand-ecc-strength = <4>;
0211 nand-ecc-step-size = <512>;
0212
0213 marvell,nand-enable-arbiter;
0214
0215 partitions {
0216 compatible = "fixed-partitions";
0217 #address-cells = <1>;
0218 #size-cells = <1>;
0219 partition@user {
0220 reg = <0x00000000 0x0f000000>;
0221 label = "user";
0222 };
0223 partition@errlog {
0224 /* Maximum mtdoops size is 8MB, so set to that. */
0225 reg = <0x0f000000 0x00800000>;
0226 label = "errlog";
0227 };
0228 partition@nand-bbt {
0229 reg = <0x0f800000 0x00800000>;
0230 label = "nand-bbt";
0231 };
0232 };
0233 };
0234 };
0235
