boot/dts/armada-375-db.dts

0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003  * Device Tree file for Marvell Armada 375 evaluation board
0004  * (DB-88F6720)
0005  *
0006  *  Copyright (C) 2014 Marvell
0007  *
0008  * Gregory CLEMENT <gregory.clement@free-electrons.com>
0009  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
0010  */
0011
0012 /dts-v1/;
0013 #include <dt-bindings/gpio/gpio.h>
0014 #include "armada-375.dtsi"
0015
0016 / {
0017         model = "Marvell Armada 375 Development Board";
0018         compatible = "marvell,a375-db", "marvell,armada375";
0019
0020         chosen {
0021                 stdout-path = "serial0:115200n8";
0022         };
0023
0024         memory@0 {
0025                 device_type = "memory";
0026                 reg = <0x00000000 0x40000000>; /* 1 GB */
0027         };
0028
0029         soc {
0030                 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
0031                           MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
0032                           MBUS_ID(0x09, 0x09) 0 0xf1100000 0x10000
0033                           MBUS_ID(0x09, 0x05) 0 0xf1110000 0x10000>;
0034
0035         };
0036 };
0037 &pciec {
0038         status = "okay";
0039 };
0040
0041 /*
0042  * The two PCIe units are accessible through
0043  * standard PCIe slots on the board.
0044  */
0045 &pcie0 {
0046         /* Port 0, Lane 0 */
0047         status = "okay";
0048 };
0049
0050 &pcie1 {
0051         /* Port 1, Lane 0 */
0052         status = "okay";
0053 };
0054
0055
0056 &spi0 {
0057         pinctrl-0 = <&spi0_pins>;
0058         pinctrl-names = "default";
0059
0060         /*
0061          * SPI conflicts with NAND, so we disable it here, and
0062          * select NAND as the enabled device by default.
0063          */
0064
0065         status = "disabled";
0066
0067         flash@0 {
0068                 #address-cells = <1>;
0069                 #size-cells = <1>;
0070                 compatible = "n25q128a13", "jedec,spi-nor";
0071                 reg = <0>; /* Chip select 0 */
0072                 spi-max-frequency = <108000000>;
0073         };
0074 };
0075
0076 &i2c0 {
0077         status = "okay";
0078         clock-frequency = <100000>;
0079         pinctrl-0 = <&i2c0_pins>;
0080         pinctrl-names = "default";
0081 };
0082
0083 &i2c1 {
0084         status = "okay";
0085         clock-frequency = <100000>;
0086         pinctrl-0 = <&i2c1_pins>;
0087         pinctrl-names = "default";
0088 };
0089
0090 &uart0 {
0091         status = "okay";
0092 };
0093
0094 &pinctrl {
0095         sdio_st_pins: sdio-st-pins {
0096                 marvell,pins = "mpp44", "mpp45";
0097                 marvell,function = "gpio";
0098         };
0099 };
0100
0101 &sata {
0102         status = "okay";
0103         nr-ports = <2>;
0104 };
0105
0106 &nand_controller {
0107         status = "okay";
0108         pinctrl-0 = <&nand_pins>;
0109         pinctrl-names = "default";
0110
0111         nand@0 {
0112                 reg = <0>;
0113                 label = "pxa3xx_nand-0";
0114                 nand-rb = <0>;
0115                 marvell,nand-keep-config;
0116                 nand-on-flash-bbt;
0117                 nand-ecc-strength = <4>;
0118                 nand-ecc-step-size = <512>;
0119
0120                 partitions {
0121                         compatible = "fixed-partitions";
0122                         #address-cells = <1>;
0123                         #size-cells = <1>;
0124
0125                         partition@0 {
0126                                 label = "U-Boot";
0127                                 reg = <0 0x800000>;
0128                         };
0129                         partition@800000 {
0130                                 label = "Linux";
0131                                 reg = <0x800000 0x800000>;
0132                         };
0133                         partition@1000000 {
0134                                 label = "Filesystem";
0135                                 reg = <0x1000000 0x3f000000>;
0136                         };
0137                 };
0138         };
0139 };
0140
0141 &usb1 {
0142         status = "okay";
0143 };
0144
0145 &usb2 {
0146         status = "okay";
0147 };
0148
0149 &sdio {
0150         pinctrl-0 = <&sdio_pins &sdio_st_pins>;
0151         pinctrl-names = "default";
0152         status = "okay";
0153         cd-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
0154         wp-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
0155 };
0156
0157 &mdio {
0158         phy0: ethernet-phy@0 {
0159                 reg = <0>;
0160         };
0161
0162         phy3: ethernet-phy@3 {
0163                 reg = <3>;
0164         };
0165 };
0166
0167 &ethernet {
0168         status = "okay";
0169 };
0170
0171
0172 &eth0 {
0173         status = "okay";
0174         phy = <&phy0>;
0175         phy-mode = "rgmii-id";
0176 };
0177
0178 &eth1 {
0179         status = "okay";
0180         phy = <&phy3>;
0181         phy-mode = "gmii";
0182 };