0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Device Tree file for Marvell Armada 370 Reference Design board
0004 * (RD-88F6710-A1)
0005 *
0006 * Copied from arch/arm/boot/dts/armada-370-db.dts
0007 *
0008 * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
0009 *
0010 * Note: this Device Tree assumes that the bootloader has remapped the
0011 * internal registers to 0xf1000000 (instead of the default
0012 * 0xd0000000). The 0xf1000000 is the default used by the recent,
0013 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
0014 * boards were delivered with an older version of the bootloader that
0015 * left internal registers mapped at 0xd0000000. If you are in this
0016 * situation, you should either update your bootloader (preferred
0017 * solution) or the below Device Tree should be adjusted.
0018 */
0019
0020 /dts-v1/;
0021 #include <dt-bindings/input/input.h>
0022 #include <dt-bindings/interrupt-controller/irq.h>
0023 #include <dt-bindings/gpio/gpio.h>
0024 #include "armada-370.dtsi"
0025
0026 / {
0027 model = "Marvell Armada 370 Reference Design";
0028 compatible = "marvell,a370-rd", "marvell,armada370", "marvell,armada-370-xp";
0029
0030 chosen {
0031 stdout-path = "serial0:115200n8";
0032 };
0033
0034 memory@0 {
0035 device_type = "memory";
0036 reg = <0x00000000 0x20000000>; /* 512 MB */
0037 };
0038
0039 soc {
0040 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
0041 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
0042 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
0043
0044 internal-regs {
0045 serial@12000 {
0046 status = "okay";
0047 };
0048 sata@a0000 {
0049 nr-ports = <2>;
0050 status = "okay";
0051 };
0052
0053 ethernet@70000 {
0054 status = "okay";
0055 phy = <&phy0>;
0056 phy-mode = "sgmii";
0057 };
0058 ethernet@74000 {
0059 pinctrl-0 = <&ge1_rgmii_pins>;
0060 pinctrl-names = "default";
0061 status = "okay";
0062 phy-mode = "rgmii-id";
0063 fixed-link {
0064 speed = <1000>;
0065 full-duplex;
0066 };
0067 };
0068
0069 mvsdio@d4000 {
0070 pinctrl-0 = <&sdio_pins1>;
0071 pinctrl-names = "default";
0072 status = "okay";
0073 /* No CD or WP GPIOs */
0074 broken-cd;
0075 };
0076
0077 usb@50000 {
0078 status = "okay";
0079 };
0080
0081 usb@51000 {
0082 status = "okay";
0083 };
0084
0085 gpio-keys {
0086 compatible = "gpio-keys";
0087 button {
0088 label = "Software Button";
0089 linux,code = <KEY_POWER>;
0090 gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
0091 };
0092 };
0093
0094 gpio-fan {
0095 compatible = "gpio-fan";
0096 gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
0097 gpio-fan,speed-map = <0 0 3000 1>;
0098 pinctrl-0 = <&fan_pins>;
0099 pinctrl-names = "default";
0100 };
0101
0102 gpio_leds {
0103 compatible = "gpio-leds";
0104 pinctrl-names = "default";
0105 pinctrl-0 = <&led_pins>;
0106
0107 sw_led {
0108 label = "370rd:green:sw";
0109 gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
0110 default-state = "keep";
0111 };
0112 };
0113 };
0114 };
0115 };
0116
0117 &pciec {
0118 status = "okay";
0119
0120 /* Internal mini-PCIe connector */
0121 pcie@1,0 {
0122 /* Port 0, Lane 0 */
0123 status = "okay";
0124 };
0125
0126 /* Internal mini-PCIe connector */
0127 pcie@2,0 {
0128 /* Port 1, Lane 0 */
0129 status = "okay";
0130 };
0131 };
0132
0133 &mdio {
0134 pinctrl-0 = <&mdio_pins>;
0135 pinctrl-names = "default";
0136 phy0: ethernet-phy@0 {
0137 reg = <0>;
0138 };
0139
0140 switch: switch@10 {
0141 compatible = "marvell,mv88e6085";
0142 #address-cells = <1>;
0143 #size-cells = <0>;
0144 reg = <0x10>;
0145 interrupt-controller;
0146 #interrupt-cells = <2>;
0147
0148 ports {
0149 #address-cells = <1>;
0150 #size-cells = <0>;
0151
0152 port@0 {
0153 reg = <0>;
0154 label = "lan0";
0155 };
0156
0157 port@1 {
0158 reg = <1>;
0159 label = "lan1";
0160 };
0161
0162 port@2 {
0163 reg = <2>;
0164 label = "lan2";
0165 };
0166
0167 port@3 {
0168 reg = <3>;
0169 label = "lan3";
0170 };
0171
0172 port@5 {
0173 reg = <5>;
0174 label = "cpu";
0175 ethernet = <ð1>;
0176 fixed-link {
0177 speed = <1000>;
0178 full-duplex;
0179 };
0180 };
0181 };
0182
0183 mdio {
0184 #address-cells = <1>;
0185 #size-cells = <0>;
0186
0187 switchphy0: switchphy@0 {
0188 reg = <0>;
0189 interrupt-parent = <&switch>;
0190 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
0191 };
0192
0193 switchphy1: switchphy@1 {
0194 reg = <1>;
0195 interrupt-parent = <&switch>;
0196 interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
0197 };
0198
0199 switchphy2: switchphy@2 {
0200 reg = <2>;
0201 interrupt-parent = <&switch>;
0202 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
0203 };
0204
0205 switchphy3: switchphy@3 {
0206 reg = <3>;
0207 interrupt-parent = <&switch>;
0208 interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
0209 };
0210 };
0211 };
0212 };
0213
0214
0215 &pinctrl {
0216 fan_pins: fan-pins {
0217 marvell,pins = "mpp8";
0218 marvell,function = "gpio";
0219 };
0220
0221 led_pins: led-pins {
0222 marvell,pins = "mpp32";
0223 marvell,function = "gpio";
0224 };
0225 };
0226
0227 &nand_controller {
0228 status = "okay";
0229
0230 nand@0 {
0231 reg = <0>;
0232 label = "pxa3xx_nand-0";
0233 nand-rb = <0>;
0234 marvell,nand-keep-config;
0235 nand-on-flash-bbt;
0236
0237 partitions {
0238 compatible = "fixed-partitions";
0239 #address-cells = <1>;
0240 #size-cells = <1>;
0241
0242 partition@0 {
0243 label = "U-Boot";
0244 reg = <0 0x800000>;
0245 };
0246 partition@800000 {
0247 label = "Linux";
0248 reg = <0x800000 0x800000>;
0249 };
0250 partition@1000000 {
0251 label = "Filesystem";
0252 reg = <0x1000000 0x3f000000>;
0253 };
0254 };
0255 };
0256 };
