0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
0004 */
0005
0006 /* AM437x GP EVM */
0007
0008 /dts-v1/;
0009
0010 #include "am4372.dtsi"
0011 #include <dt-bindings/pinctrl/am43xx.h>
0012 #include <dt-bindings/pwm/pwm.h>
0013 #include <dt-bindings/gpio/gpio.h>
0014
0015 / {
0016 model = "TI AM437x GP EVM";
0017 compatible = "ti,am437x-gp-evm","ti,am4372","ti,am43";
0018
0019 aliases {
0020 display0 = &lcd0;
0021 };
0022
0023 chosen {
0024 stdout-path = &uart0;
0025 };
0026
0027 evm_v3_3d: fixedregulator-v3_3d {
0028 compatible = "regulator-fixed";
0029 regulator-name = "evm_v3_3d";
0030 regulator-min-microvolt = <3300000>;
0031 regulator-max-microvolt = <3300000>;
0032 enable-active-high;
0033 };
0034
0035 vtt_fixed: fixedregulator-vtt {
0036 compatible = "regulator-fixed";
0037 regulator-name = "vtt_fixed";
0038 regulator-min-microvolt = <1500000>;
0039 regulator-max-microvolt = <1500000>;
0040 regulator-always-on;
0041 regulator-boot-on;
0042 enable-active-high;
0043 gpio = <&gpio5 7 GPIO_ACTIVE_HIGH>;
0044 };
0045
0046 vmmcwl_fixed: fixedregulator-mmcwl {
0047 compatible = "regulator-fixed";
0048 regulator-name = "vmmcwl_fixed";
0049 regulator-min-microvolt = <1800000>;
0050 regulator-max-microvolt = <1800000>;
0051 gpio = <&gpio1 20 GPIO_ACTIVE_HIGH>;
0052 enable-active-high;
0053 };
0054
0055 lcd_bl: backlight {
0056 compatible = "pwm-backlight";
0057 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
0058 brightness-levels = <0 51 53 56 62 75 101 152 255>;
0059 default-brightness-level = <8>;
0060 };
0061
0062 matrix_keypad: matrix_keypad0 {
0063 compatible = "gpio-matrix-keypad";
0064 debounce-delay-ms = <5>;
0065 col-scan-delay-us = <2>;
0066
0067 pinctrl-names = "default", "sleep";
0068 pinctrl-0 = <&matrix_keypad_default>;
0069 pinctrl-1 = <&matrix_keypad_sleep>;
0070
0071 wakeup-source;
0072
0073 row-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH /* Bank0, pin3 */
0074 &gpio4 3 GPIO_ACTIVE_HIGH /* Bank4, pin3 */
0075 &gpio4 2 GPIO_ACTIVE_HIGH>; /* Bank4, pin2 */
0076
0077 col-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH /* Bank3, pin19 */
0078 &gpio3 20 GPIO_ACTIVE_HIGH>; /* Bank3, pin20 */
0079
0080 linux,keymap = <0x00000201 /* P1 */
0081 0x00010202 /* P2 */
0082 0x01000067 /* UP */
0083 0x0101006a /* RIGHT */
0084 0x02000069 /* LEFT */
0085 0x0201006c>; /* DOWN */
0086 };
0087
0088 lcd0: display {
0089 compatible = "osddisplays,osd070t1718-19ts", "panel-dpi";
0090 label = "lcd";
0091
0092 backlight = <&lcd_bl>;
0093
0094 port {
0095 lcd_in: endpoint {
0096 remote-endpoint = <&dpi_out>;
0097 };
0098 };
0099 };
0100
0101 /* fixed 12MHz oscillator */
0102 refclk: oscillator {
0103 #clock-cells = <0>;
0104 compatible = "fixed-clock";
0105 clock-frequency = <12000000>;
0106 };
0107
0108 /* fixed 32k external oscillator clock */
0109 clk_32k_rtc: clk_32k_rtc {
0110 #clock-cells = <0>;
0111 compatible = "fixed-clock";
0112 clock-frequency = <32768>;
0113 };
0114
0115 sound0: sound0 {
0116 compatible = "simple-audio-card";
0117 simple-audio-card,name = "AM437x-GP-EVM";
0118 simple-audio-card,widgets =
0119 "Headphone", "Headphone Jack",
0120 "Line", "Line In";
0121 simple-audio-card,routing =
0122 "Headphone Jack", "HPLOUT",
0123 "Headphone Jack", "HPROUT",
0124 "LINE1L", "Line In",
0125 "LINE1R", "Line In";
0126 simple-audio-card,format = "dsp_b";
0127 simple-audio-card,bitclock-master = <&sound0_master>;
0128 simple-audio-card,frame-master = <&sound0_master>;
0129 simple-audio-card,bitclock-inversion;
0130
0131 simple-audio-card,cpu {
0132 sound-dai = <&mcasp1>;
0133 system-clock-frequency = <12000000>;
0134 };
0135
0136 sound0_master: simple-audio-card,codec {
0137 sound-dai = <&tlv320aic3106>;
0138 system-clock-frequency = <12000000>;
0139 };
0140 };
0141
0142 beeper: beeper {
0143 compatible = "gpio-beeper";
0144 pinctrl-names = "default";
0145 pinctrl-0 = <&beeper_pins_default>;
0146 pinctrl-1 = <&beeper_pins_sleep>;
0147 gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
0148 };
0149 };
0150
0151 &am43xx_pinmux {
0152 pinctrl-names = "default", "sleep";
0153 pinctrl-0 = <&wlan_pins_default &ddr3_vtt_toggle_default &unused_pins &debugss_pins>;
0154 pinctrl-1 = <&wlan_pins_sleep>;
0155
0156 ddr3_vtt_toggle_default: ddr_vtt_toggle_default {
0157 pinctrl-single,pins = <
0158 0x25C (DS0_PULL_UP_DOWN_EN | PIN_OUTPUT_PULLUP | DS0_FORCE_OFF_MODE | MUX_MODE7) /* spi0_cs0.gpio5_7 */
0159 >;
0160 };
0161
0162 i2c0_pins: i2c0_pins {
0163 pinctrl-single,pins = <
0164 AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0165 AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
0166 >;
0167 };
0168
0169 i2c1_pins: i2c1_pins {
0170 pinctrl-single,pins = <
0171 AM4372_IOPAD(0x95c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
0172 AM4372_IOPAD(0x958, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
0173 >;
0174 };
0175
0176 mmc1_pins: pinmux_mmc1_pins {
0177 pinctrl-single,pins = <
0178 AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
0179 >;
0180 };
0181
0182 ecap0_pins: backlight_pins {
0183 pinctrl-single,pins = <
0184 AM4372_IOPAD(0x964, MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
0185 >;
0186 };
0187
0188 pixcir_ts_pins: pixcir_ts_pins {
0189 pinctrl-single,pins = <
0190 AM4372_IOPAD(0xa64, PIN_INPUT_PULLUP | MUX_MODE7) /* spi2_d0.gpio3_22 */
0191 >;
0192 };
0193
0194 cpsw_default: cpsw_default {
0195 pinctrl-single,pins = <
0196 /* Slave 1 */
0197 AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_txen */
0198 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rxctl */
0199 AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_txd3 */
0200 AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_txd2 */
0201 AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_txd1 */
0202 AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_txd0 */
0203 AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
0204 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
0205 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rxd3 */
0206 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rxd2 */
0207 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rxd1 */
0208 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rxd0 */
0209 >;
0210 };
0211
0212 cpsw_sleep: cpsw_sleep {
0213 pinctrl-single,pins = <
0214 /* Slave 1 reset value */
0215 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
0216 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
0217 AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
0218 AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
0219 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
0220 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
0221 AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
0222 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
0223 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
0224 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
0225 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
0226 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
0227 >;
0228 };
0229
0230 davinci_mdio_default: davinci_mdio_default {
0231 pinctrl-single,pins = <
0232 /* MDIO */
0233 AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
0234 AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
0235 >;
0236 };
0237
0238 davinci_mdio_sleep: davinci_mdio_sleep {
0239 pinctrl-single,pins = <
0240 /* MDIO reset value */
0241 AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
0242 AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
0243 >;
0244 };
0245
0246 nand_flash_x8: nand_flash_x8 {
0247 pinctrl-single,pins = <
0248 AM4372_IOPAD(0x800, PIN_INPUT | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
0249 AM4372_IOPAD(0x804, PIN_INPUT | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
0250 AM4372_IOPAD(0x808, PIN_INPUT | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
0251 AM4372_IOPAD(0x80c, PIN_INPUT | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
0252 AM4372_IOPAD(0x810, PIN_INPUT | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
0253 AM4372_IOPAD(0x814, PIN_INPUT | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
0254 AM4372_IOPAD(0x818, PIN_INPUT | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
0255 AM4372_IOPAD(0x81c, PIN_INPUT | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
0256 AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
0257 AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpmc_wpn */
0258 AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
0259 AM4372_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
0260 AM4372_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
0261 AM4372_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
0262 AM4372_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
0263 >;
0264 };
0265
0266 dss_pins: dss_pins {
0267 pinctrl-single,pins = <
0268 AM4372_IOPAD(0x820, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */
0269 AM4372_IOPAD(0x824, PIN_OUTPUT_PULLUP | MUX_MODE1)
0270 AM4372_IOPAD(0x828, PIN_OUTPUT_PULLUP | MUX_MODE1)
0271 AM4372_IOPAD(0x82c, PIN_OUTPUT_PULLUP | MUX_MODE1)
0272 AM4372_IOPAD(0x830, PIN_OUTPUT_PULLUP | MUX_MODE1)
0273 AM4372_IOPAD(0x834, PIN_OUTPUT_PULLUP | MUX_MODE1)
0274 AM4372_IOPAD(0x838, PIN_OUTPUT_PULLUP | MUX_MODE1)
0275 AM4372_IOPAD(0x83c, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */
0276 AM4372_IOPAD(0x8a0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
0277 AM4372_IOPAD(0x8a4, PIN_OUTPUT_PULLUP | MUX_MODE0)
0278 AM4372_IOPAD(0x8a8, PIN_OUTPUT_PULLUP | MUX_MODE0)
0279 AM4372_IOPAD(0x8ac, PIN_OUTPUT_PULLUP | MUX_MODE0)
0280 AM4372_IOPAD(0x8b0, PIN_OUTPUT_PULLUP | MUX_MODE0)
0281 AM4372_IOPAD(0x8b4, PIN_OUTPUT_PULLUP | MUX_MODE0)
0282 AM4372_IOPAD(0x8b8, PIN_OUTPUT_PULLUP | MUX_MODE0)
0283 AM4372_IOPAD(0x8bc, PIN_OUTPUT_PULLUP | MUX_MODE0)
0284 AM4372_IOPAD(0x8c0, PIN_OUTPUT_PULLUP | MUX_MODE0)
0285 AM4372_IOPAD(0x8c4, PIN_OUTPUT_PULLUP | MUX_MODE0)
0286 AM4372_IOPAD(0x8c8, PIN_OUTPUT_PULLUP | MUX_MODE0)
0287 AM4372_IOPAD(0x8cc, PIN_OUTPUT_PULLUP | MUX_MODE0)
0288 AM4372_IOPAD(0x8d0, PIN_OUTPUT_PULLUP | MUX_MODE0)
0289 AM4372_IOPAD(0x8d4, PIN_OUTPUT_PULLUP | MUX_MODE0)
0290 AM4372_IOPAD(0x8d8, PIN_OUTPUT_PULLUP | MUX_MODE0)
0291 AM4372_IOPAD(0x8dc, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
0292 AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
0293 AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
0294 AM4372_IOPAD(0x8e8, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
0295 AM4372_IOPAD(0x8ec, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
0296
0297 >;
0298 };
0299
0300 display_mux_pins: display_mux_pins {
0301 pinctrl-single,pins = <
0302 /* GPIO 5_8 to select LCD / HDMI */
0303 AM4372_IOPAD(0xa38, PIN_OUTPUT_PULLUP | MUX_MODE7)
0304 >;
0305 };
0306
0307 dcan0_default: dcan0_default_pins {
0308 pinctrl-single,pins = <
0309 AM4372_IOPAD(0x978, PIN_OUTPUT | MUX_MODE2) /* uart1_ctsn.d_can0_tx */
0310 AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_rtsn.d_can0_rx */
0311 >;
0312 };
0313
0314 dcan0_sleep: dcan0_sleep_pins {
0315 pinctrl-single,pins = <
0316 AM4372_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_ctsn.gpio0_12 */
0317 AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_rtsn.gpio0_13 */
0318 >;
0319 };
0320
0321 dcan1_default: dcan1_default_pins {
0322 pinctrl-single,pins = <
0323 AM4372_IOPAD(0x980, PIN_OUTPUT | MUX_MODE2) /* uart1_rxd.d_can1_tx */
0324 AM4372_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_txd.d_can1_rx */
0325 >;
0326 };
0327
0328 dcan1_sleep: dcan1_sleep_pins {
0329 pinctrl-single,pins = <
0330 AM4372_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_rxd.gpio0_14 */
0331 AM4372_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_txd.gpio0_15 */
0332 >;
0333 };
0334
0335 vpfe0_pins_default: vpfe0_pins_default {
0336 pinctrl-single,pins = <
0337 AM4372_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/
0338 AM4372_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/
0339 AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/
0340 AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/
0341 AM4372_IOPAD(0x9c8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/
0342 AM4372_IOPAD(0xa08, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/
0343 AM4372_IOPAD(0xa0c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/
0344 AM4372_IOPAD(0xa10, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/
0345 AM4372_IOPAD(0xa14, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/
0346 AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/
0347 AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/
0348 AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/
0349 AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/
0350 >;
0351 };
0352
0353 vpfe0_pins_sleep: vpfe0_pins_sleep {
0354 pinctrl-single,pins = <
0355 AM4372_IOPAD(0x9b0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_hd mode 0*/
0356 AM4372_IOPAD(0x9b4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_vd mode 0*/
0357 AM4372_IOPAD(0x9c0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_pclk mode 0*/
0358 AM4372_IOPAD(0x9c4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data8 mode 0*/
0359 AM4372_IOPAD(0x9c8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data9 mode 0*/
0360 AM4372_IOPAD(0xa08, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data0 mode 0*/
0361 AM4372_IOPAD(0xa0c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data1 mode 0*/
0362 AM4372_IOPAD(0xa10, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data2 mode 0*/
0363 AM4372_IOPAD(0xa14, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data3 mode 0*/
0364 AM4372_IOPAD(0xa18, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data4 mode 0*/
0365 AM4372_IOPAD(0xa1c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data5 mode 0*/
0366 AM4372_IOPAD(0xa20, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data6 mode 0*/
0367 AM4372_IOPAD(0xa24, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data7 mode 0*/
0368 >;
0369 };
0370
0371 vpfe1_pins_default: vpfe1_pins_default {
0372 pinctrl-single,pins = <
0373 AM4372_IOPAD(0x9cc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data9 mode 0*/
0374 AM4372_IOPAD(0x9d0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data8 mode 0*/
0375 AM4372_IOPAD(0x9d4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_hd mode 0*/
0376 AM4372_IOPAD(0x9d8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_vd mode 0*/
0377 AM4372_IOPAD(0x9dC, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_pclk mode 0*/
0378 AM4372_IOPAD(0x9e8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data0 mode 0*/
0379 AM4372_IOPAD(0x9ec, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data1 mode 0*/
0380 AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data2 mode 0*/
0381 AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data3 mode 0*/
0382 AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data4 mode 0*/
0383 AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data5 mode 0*/
0384 AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data6 mode 0*/
0385 AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data7 mode 0*/
0386 >;
0387 };
0388
0389 vpfe1_pins_sleep: vpfe1_pins_sleep {
0390 pinctrl-single,pins = <
0391 AM4372_IOPAD(0x9cc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data9 mode 0*/
0392 AM4372_IOPAD(0x9d0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data8 mode 0*/
0393 AM4372_IOPAD(0x9d4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_hd mode 0*/
0394 AM4372_IOPAD(0x9d8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_vd mode 0*/
0395 AM4372_IOPAD(0x9dc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_pclk mode 0*/
0396 AM4372_IOPAD(0x9e8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data0 mode 0*/
0397 AM4372_IOPAD(0x9ec, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data1 mode 0*/
0398 AM4372_IOPAD(0x9f0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data2 mode 0*/
0399 AM4372_IOPAD(0x9f4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data3 mode 0*/
0400 AM4372_IOPAD(0x9f8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data4 mode 0*/
0401 AM4372_IOPAD(0x9fc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data5 mode 0*/
0402 AM4372_IOPAD(0xa00, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data6 mode 0*/
0403 AM4372_IOPAD(0xa04, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data7 mode 0*/
0404 >;
0405 };
0406
0407 mmc3_pins_default: pinmux_mmc3_pins_default {
0408 pinctrl-single,pins = <
0409 AM4372_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_clk.mmc2_clk */
0410 AM4372_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_csn3.mmc2_cmd */
0411 AM4372_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a1.mmc2_dat0 */
0412 AM4372_IOPAD(0x848, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a2.mmc2_dat1 */
0413 AM4372_IOPAD(0x84c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a3.mmc2_dat2 */
0414 AM4372_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be1n.mmc2_dat3 */
0415 >;
0416 };
0417
0418 mmc3_pins_sleep: pinmux_mmc3_pins_sleep {
0419 pinctrl-single,pins = <
0420 AM4372_IOPAD(0x88c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_clk.mmc2_clk */
0421 AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn3.mmc2_cmd */
0422 AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a1.mmc2_dat0 */
0423 AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a2.mmc2_dat1 */
0424 AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a3.mmc2_dat2 */
0425 AM4372_IOPAD(0x878, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_be1n.mmc2_dat3 */
0426 >;
0427 };
0428
0429 wlan_pins_default: pinmux_wlan_pins_default {
0430 pinctrl-single,pins = <
0431 AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a4.gpio1_20 WL_EN */
0432 AM4372_IOPAD(0x85c, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* gpmc_a7.gpio1_23 WL_IRQ*/
0433 AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.gpio1_16 BT_EN*/
0434 >;
0435 };
0436
0437 wlan_pins_sleep: pinmux_wlan_pins_sleep {
0438 pinctrl-single,pins = <
0439 AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a4.gpio1_20 WL_EN */
0440 AM4372_IOPAD(0x85c, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* gpmc_a7.gpio1_23 WL_IRQ*/
0441 AM4372_IOPAD(0x840, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a0.gpio1_16 BT_EN*/
0442 >;
0443 };
0444
0445 uart3_pins: uart3_pins {
0446 pinctrl-single,pins = <
0447 AM4372_IOPAD(0xa28, PIN_INPUT | MUX_MODE0) /* uart3_rxd.uart3_rxd */
0448 AM4372_IOPAD(0xa2c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_txd.uart3_txd */
0449 AM4372_IOPAD(0xa30, PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_ctsn.uart3_ctsn */
0450 AM4372_IOPAD(0xa34, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_rtsn.uart3_rtsn */
0451 >;
0452 };
0453
0454 mcasp1_pins: mcasp1_pins {
0455 pinctrl-single,pins = <
0456 AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
0457 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
0458 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
0459 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
0460 >;
0461 };
0462
0463 mcasp1_sleep_pins: mcasp1_sleep_pins {
0464 pinctrl-single,pins = <
0465 AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
0466 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
0467 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
0468 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
0469 >;
0470 };
0471
0472 gpio0_pins: gpio0_pins {
0473 pinctrl-single,pins = <
0474 AM4372_IOPAD(0xa6c, PIN_OUTPUT | MUX_MODE9) /* spi2_cs0.gpio0_23 SEL_eMMCorNANDn */
0475 >;
0476 };
0477
0478 emmc_pins_default: emmc_pins_default {
0479 pinctrl-single,pins = <
0480 AM4372_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
0481 AM4372_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
0482 AM4372_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
0483 AM4372_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
0484 AM4372_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
0485 AM4372_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
0486 AM4372_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
0487 AM4372_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
0488 AM4372_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
0489 AM4372_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
0490 >;
0491 };
0492
0493 emmc_pins_sleep: emmc_pins_sleep {
0494 pinctrl-single,pins = <
0495 AM4372_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad0.gpio1_0 */
0496 AM4372_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad1.gpio1_1 */
0497 AM4372_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad2.gpio1_2 */
0498 AM4372_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad3.gpio1_3 */
0499 AM4372_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
0500 AM4372_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
0501 AM4372_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
0502 AM4372_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
0503 AM4372_IOPAD(0x880, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn1.gpio1_30 */
0504 AM4372_IOPAD(0x884, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn2.gpio1_31 */
0505 >;
0506 };
0507
0508 beeper_pins_default: beeper_pins_default {
0509 pinctrl-single,pins = <
0510 AM4372_IOPAD(0x9e0, PIN_OUTPUT_PULLUP | MUX_MODE7) /* cam1_field.gpio4_12 */
0511 >;
0512 };
0513
0514 beeper_pins_sleep: beeper_pins_sleep {
0515 pinctrl-single,pins = <
0516 AM4372_IOPAD(0x9e0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* cam1_field.gpio4_12 */
0517 >;
0518 };
0519
0520 unused_pins: unused_pins {
0521 pinctrl-single,pins = <
0522 AM4372_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
0523 AM4372_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
0524 AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
0525 AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
0526 AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
0527 AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
0528 AM4372_IOPAD(0x950, PIN_INPUT_PULLDOWN | MUX_MODE7)
0529 AM4372_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE7)
0530 AM4372_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE7)
0531 AM4372_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE7)
0532 AM4372_IOPAD(0x99c, PIN_INPUT_PULLDOWN | MUX_MODE7)
0533 AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7)
0534 AM4372_IOPAD(0xa3c, PIN_INPUT | PULL_DISABLE | MUX_MODE7)
0535 AM4372_IOPAD(0xa40, PIN_INPUT_PULLDOWN | MUX_MODE7)
0536 AM4372_IOPAD(0xa44, PIN_INPUT_PULLDOWN | MUX_MODE7)
0537 AM4372_IOPAD(0xa48, PIN_INPUT_PULLDOWN | MUX_MODE7)
0538 AM4372_IOPAD(0xa4c, PIN_INPUT_PULLDOWN | MUX_MODE7)
0539 AM4372_IOPAD(0xa50, PIN_INPUT_PULLDOWN | MUX_MODE7)
0540 AM4372_IOPAD(0xa54, PIN_INPUT | PULL_DISABLE | MUX_MODE7)
0541 AM4372_IOPAD(0xa58, PIN_INPUT_PULLDOWN | MUX_MODE7)
0542 AM4372_IOPAD(0xa60, PIN_INPUT | PULL_DISABLE | MUX_MODE7)
0543 AM4372_IOPAD(0xa68, PIN_INPUT_PULLDOWN | MUX_MODE7)
0544 AM4372_IOPAD(0xa70, PIN_INPUT_PULLDOWN | MUX_MODE7)
0545 AM4372_IOPAD(0xa78, PIN_INPUT_PULLDOWN | MUX_MODE7)
0546 AM4372_IOPAD(0xa7c, PIN_INPUT | PULL_DISABLE)
0547 AM4372_IOPAD(0xac8, PIN_INPUT_PULLDOWN)
0548 AM4372_IOPAD(0xad4, PIN_INPUT_PULLDOWN)
0549 AM4372_IOPAD(0xad8, PIN_INPUT_PULLDOWN | MUX_MODE7)
0550 AM4372_IOPAD(0xadc, PIN_INPUT_PULLDOWN | MUX_MODE7)
0551 AM4372_IOPAD(0xae0, PIN_INPUT_PULLDOWN | MUX_MODE7)
0552 AM4372_IOPAD(0xae4, PIN_INPUT_PULLDOWN | MUX_MODE7)
0553 AM4372_IOPAD(0xae8, PIN_INPUT_PULLDOWN | MUX_MODE7)
0554 AM4372_IOPAD(0xaec, PIN_INPUT_PULLDOWN | MUX_MODE7)
0555 AM4372_IOPAD(0xaf0, PIN_INPUT_PULLDOWN | MUX_MODE7)
0556 AM4372_IOPAD(0xaf4, PIN_INPUT_PULLDOWN | MUX_MODE7)
0557 AM4372_IOPAD(0xaf8, PIN_INPUT_PULLDOWN | MUX_MODE7)
0558 AM4372_IOPAD(0xafc, PIN_INPUT_PULLDOWN | MUX_MODE7)
0559 AM4372_IOPAD(0xb00, PIN_INPUT_PULLDOWN | MUX_MODE7)
0560 AM4372_IOPAD(0xb04, PIN_INPUT_PULLDOWN | MUX_MODE7)
0561 AM4372_IOPAD(0xb08, PIN_INPUT_PULLDOWN | MUX_MODE7)
0562 AM4372_IOPAD(0xb0c, PIN_INPUT_PULLDOWN | MUX_MODE7)
0563 AM4372_IOPAD(0xb10, PIN_INPUT_PULLDOWN | MUX_MODE7)
0564 AM4372_IOPAD(0xb14, PIN_INPUT_PULLDOWN | MUX_MODE7)
0565 AM4372_IOPAD(0xb18, PIN_INPUT_PULLDOWN | MUX_MODE7)
0566 >;
0567 };
0568
0569 debugss_pins: pinmux_debugss_pins {
0570 pinctrl-single,pins = <
0571 AM4372_IOPAD(0xa90, PIN_INPUT_PULLDOWN)
0572 AM4372_IOPAD(0xa94, PIN_INPUT_PULLDOWN)
0573 AM4372_IOPAD(0xa98, PIN_INPUT_PULLDOWN)
0574 AM4372_IOPAD(0xa9c, PIN_INPUT_PULLDOWN)
0575 AM4372_IOPAD(0xaa0, PIN_INPUT_PULLDOWN)
0576 AM4372_IOPAD(0xaa4, PIN_INPUT_PULLDOWN)
0577 AM4372_IOPAD(0xaa8, PIN_INPUT_PULLDOWN)
0578 >;
0579 };
0580
0581 uart0_pins_default: uart0_pins_default {
0582 pinctrl-single,pins = <
0583 AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_ctsn.uart0_ctsn */
0584 AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_rtsn.uart0_rtsn */
0585 AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */
0586 AM4372_IOPAD(0x974, PIN_INPUT | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */
0587 >;
0588 };
0589
0590 uart0_pins_sleep: uart0_pins_sleep {
0591 pinctrl-single,pins = <
0592 AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* uart0_ctsn.uart0_ctsn */
0593 AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* uart0_rtsn.uart0_rtsn */
0594 AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */
0595 AM4372_IOPAD(0x974, PIN_INPUT_PULLDOWN | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */
0596 >;
0597 };
0598
0599 matrix_keypad_default: matrix_keypad_default {
0600 pinctrl-single,pins = <
0601 AM4372_IOPAD(0x9a4, PIN_OUTPUT | MUX_MODE7)
0602 AM4372_IOPAD(0x9a8, PIN_OUTPUT | MUX_MODE7)
0603 AM4372_IOPAD(0x9ac, PIN_INPUT | PULL_DISABLE | MUX_MODE9)
0604 AM4372_IOPAD(0x954, PIN_INPUT_PULLDOWN | MUX_MODE0)
0605 >;
0606 };
0607
0608 matrix_keypad_sleep: matrix_keypad_sleep {
0609 pinctrl-single,pins = <
0610 AM4372_IOPAD(0x9a4, PULL_UP | MUX_MODE7)
0611 AM4372_IOPAD(0x9a8, PULL_UP | MUX_MODE7)
0612 AM4372_IOPAD(0x9ac, PIN_INPUT | PULL_DISABLE | MUX_MODE9)
0613 AM4372_IOPAD(0x954, PIN_INPUT_PULLDOWN | MUX_MODE0)
0614 >;
0615 };
0616 };
0617
0618 &uart0 {
0619 status = "okay";
0620 pinctrl-names = "default", "sleep";
0621 pinctrl-0 = <&uart0_pins_default>;
0622 pinctrl-1 = <&uart0_pins_sleep>;
0623 };
0624
0625 &i2c0 {
0626 status = "okay";
0627 pinctrl-names = "default";
0628 pinctrl-0 = <&i2c0_pins>;
0629 clock-frequency = <100000>;
0630
0631 tps65218: tps65218@24 {
0632 reg = <0x24>;
0633 compatible = "ti,tps65218";
0634 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* NMIn */
0635 interrupt-controller;
0636 #interrupt-cells = <2>;
0637
0638 dcdc1: regulator-dcdc1 {
0639 regulator-name = "vdd_core";
0640 regulator-min-microvolt = <912000>;
0641 regulator-max-microvolt = <1144000>;
0642 regulator-boot-on;
0643 regulator-always-on;
0644 };
0645
0646 dcdc2: regulator-dcdc2 {
0647 regulator-name = "vdd_mpu";
0648 regulator-min-microvolt = <912000>;
0649 regulator-max-microvolt = <1378000>;
0650 regulator-boot-on;
0651 regulator-always-on;
0652 };
0653
0654 dcdc3: regulator-dcdc3 {
0655 regulator-name = "vdcdc3";
0656 regulator-boot-on;
0657 regulator-always-on;
0658 regulator-state-mem {
0659 regulator-on-in-suspend;
0660 };
0661 regulator-state-disk {
0662 regulator-off-in-suspend;
0663 };
0664 };
0665
0666 dcdc5: regulator-dcdc5 {
0667 regulator-name = "v1_0bat";
0668 regulator-min-microvolt = <1000000>;
0669 regulator-max-microvolt = <1000000>;
0670 regulator-boot-on;
0671 regulator-always-on;
0672 regulator-state-mem {
0673 regulator-on-in-suspend;
0674 };
0675 };
0676
0677 dcdc6: regulator-dcdc6 {
0678 regulator-name = "v1_8bat";
0679 regulator-min-microvolt = <1800000>;
0680 regulator-max-microvolt = <1800000>;
0681 regulator-boot-on;
0682 regulator-always-on;
0683 regulator-state-mem {
0684 regulator-on-in-suspend;
0685 };
0686 };
0687
0688 ldo1: regulator-ldo1 {
0689 regulator-min-microvolt = <1800000>;
0690 regulator-max-microvolt = <1800000>;
0691 regulator-boot-on;
0692 regulator-always-on;
0693 };
0694 };
0695
0696 ov2659@30 {
0697 compatible = "ovti,ov2659";
0698 reg = <0x30>;
0699
0700 clocks = <&refclk 0>;
0701 clock-names = "xvclk";
0702
0703 port {
0704 ov2659_0: endpoint {
0705 remote-endpoint = <&vpfe1_ep>;
0706 link-frequencies = /bits/ 64 <70000000>;
0707 };
0708 };
0709 };
0710 };
0711
0712 &i2c1 {
0713 status = "okay";
0714 pinctrl-names = "default";
0715 pinctrl-0 = <&i2c1_pins>;
0716 pixcir_ts@5c {
0717 compatible = "pixcir,pixcir_tangoc";
0718 pinctrl-names = "default";
0719 pinctrl-0 = <&pixcir_ts_pins>;
0720 reg = <0x5c>;
0721
0722 attb-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
0723
0724 /*
0725 * 0x264 represents the offset of padconf register of
0726 * gpio3_22 from am43xx_pinmux base.
0727 */
0728 interrupts-extended = <&gpio3 22 IRQ_TYPE_EDGE_FALLING>,
0729 <&am43xx_pinmux 0x264>;
0730 interrupt-names = "tsc", "wakeup";
0731
0732 touchscreen-size-x = <1024>;
0733 touchscreen-size-y = <600>;
0734 wakeup-source;
0735 };
0736
0737 ov2659@30 {
0738 compatible = "ovti,ov2659";
0739 reg = <0x30>;
0740
0741 clocks = <&refclk 0>;
0742 clock-names = "xvclk";
0743
0744 port {
0745 ov2659_1: endpoint {
0746 remote-endpoint = <&vpfe0_ep>;
0747 link-frequencies = /bits/ 64 <70000000>;
0748 };
0749 };
0750 };
0751
0752 tlv320aic3106: tlv320aic3106@1b {
0753 #sound-dai-cells = <0>;
0754 compatible = "ti,tlv320aic3106";
0755 reg = <0x1b>;
0756 status = "okay";
0757
0758 /* Regulators */
0759 IOVDD-supply = <&evm_v3_3d>; /* V3_3D -> <tps63031> EN: V1_8D -> VBAT */
0760 AVDD-supply = <&evm_v3_3d>; /* v3_3AUD -> V3_3D -> ... */
0761 DRVDD-supply = <&evm_v3_3d>; /* v3_3AUD -> V3_3D -> ... */
0762 DVDD-supply = <&ldo1>; /* V1_8D -> LDO1 */
0763 };
0764 };
0765
0766 &epwmss0 {
0767 status = "okay";
0768 };
0769
0770 &tscadc {
0771 status = "okay";
0772
0773 adc {
0774 ti,adc-channels = <0 1 2 3 4 5 6 7>;
0775 };
0776 };
0777
0778 &magadc {
0779 status = "okay";
0780
0781 adc {
0782 ti,adc-channels = <0 1 2 3 4 5 6 7>;
0783 };
0784 };
0785
0786 &ecap0 {
0787 status = "okay";
0788 pinctrl-names = "default";
0789 pinctrl-0 = <&ecap0_pins>;
0790 };
0791
0792 &gpio0 {
0793 pinctrl-names = "default";
0794 pinctrl-0 = <&gpio0_pins>;
0795 status = "okay";
0796
0797 sel-emmc-nand-hog {
0798 gpio-hog;
0799 gpios = <23 GPIO_ACTIVE_HIGH>;
0800 /* SelEMMCorNAND selects between eMMC and NAND:
0801 * Low: NAND
0802 * High: eMMC
0803 * When changing this line make sure the newly
0804 * selected device node is enabled and the previously
0805 * selected device node is disabled.
0806 */
0807 output-low;
0808 line-name = "SelEMMCorNAND";
0809 };
0810 };
0811
0812 &gpio1 {
0813 status = "okay";
0814 };
0815
0816 &gpio3 {
0817 status = "okay";
0818 };
0819
0820 &gpio4 {
0821 status = "okay";
0822 };
0823
0824 &gpio5_target {
0825 ti,no-reset-on-init;
0826 };
0827
0828 &gpio5 {
0829 pinctrl-names = "default";
0830 pinctrl-0 = <&display_mux_pins>;
0831 status = "okay";
0832
0833 sel-lcd-hdmi-hog {
0834 /*
0835 * SelLCDorHDMI selects between display and audio paths:
0836 * Low: HDMI display with audio via HDMI
0837 * High: LCD display with analog audio via aic3111 codec
0838 */
0839 gpio-hog;
0840 gpios = <8 GPIO_ACTIVE_HIGH>;
0841 output-high;
0842 line-name = "SelLCDorHDMI";
0843 };
0844 };
0845
0846 &mmc1 {
0847 status = "okay";
0848 vmmc-supply = <&evm_v3_3d>;
0849 bus-width = <4>;
0850 pinctrl-names = "default";
0851 pinctrl-0 = <&mmc1_pins>;
0852 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
0853 };
0854
0855 /* eMMC sits on mmc2 */
0856 &mmc2 {
0857 /*
0858 * When enabling eMMC, disable GPMC/NAND and set
0859 * SelEMMCorNAND to output-high
0860 */
0861 status = "disabled";
0862 vmmc-supply = <&evm_v3_3d>;
0863 bus-width = <8>;
0864 pinctrl-names = "default", "sleep";
0865 pinctrl-0 = <&emmc_pins_default>;
0866 pinctrl-1 = <&emmc_pins_sleep>;
0867 non-removable;
0868 };
0869
0870 &mmc3 {
0871 status = "okay";
0872 /* these are on the crossbar and are outlined in the
0873 xbar-event-map element */
0874 dmas = <&edma_xbar 30 0 1>,
0875 <&edma_xbar 31 0 2>;
0876 dma-names = "tx", "rx";
0877 vmmc-supply = <&vmmcwl_fixed>;
0878 bus-width = <4>;
0879 pinctrl-names = "default", "sleep";
0880 pinctrl-0 = <&mmc3_pins_default>;
0881 pinctrl-1 = <&mmc3_pins_sleep>;
0882 cap-power-off-card;
0883 keep-power-in-suspend;
0884 non-removable;
0885
0886 #address-cells = <1>;
0887 #size-cells = <0>;
0888 wlcore: wlcore@0 {
0889 compatible = "ti,wl1835";
0890 reg = <2>;
0891 interrupt-parent = <&gpio1>;
0892 interrupts = <23 IRQ_TYPE_EDGE_RISING>;
0893 };
0894 };
0895
0896 &uart3 {
0897 status = "okay";
0898 pinctrl-names = "default";
0899 pinctrl-0 = <&uart3_pins>;
0900 };
0901
0902 &usb2_phy1 {
0903 status = "okay";
0904 };
0905
0906 &usb1 {
0907 dr_mode = "otg";
0908 status = "okay";
0909 };
0910
0911 &usb2_phy2 {
0912 status = "okay";
0913 };
0914
0915 &usb2 {
0916 dr_mode = "host";
0917 status = "okay";
0918 };
0919
0920 &mac_sw {
0921 pinctrl-names = "default", "sleep";
0922 pinctrl-0 = <&cpsw_default>;
0923 pinctrl-1 = <&cpsw_sleep>;
0924 status = "okay";
0925 };
0926
0927 &davinci_mdio_sw {
0928 pinctrl-names = "default", "sleep";
0929 pinctrl-0 = <&davinci_mdio_default>;
0930 pinctrl-1 = <&davinci_mdio_sleep>;
0931
0932 ethphy0: ethernet-phy@0 {
0933 reg = <0>;
0934 };
0935 };
0936
0937 &cpsw_port1 {
0938 phy-handle = <ðphy0>;
0939 phy-mode = "rgmii-rxid";
0940 ti,dual-emac-pvid = <1>;
0941 };
0942
0943 &cpsw_port2 {
0944 status = "disabled";
0945 };
0946
0947 &elm {
0948 status = "okay";
0949 };
0950
0951 &gpmc {
0952 /*
0953 * When enabling GPMC, disable eMMC and set
0954 * SelEMMCorNAND to output-low
0955 */
0956 status = "okay";
0957 pinctrl-names = "default";
0958 pinctrl-0 = <&nand_flash_x8>;
0959 ranges = <0 0 0x08000000 0x01000000>; /* CS0 space. Min partition = 16MB */
0960 nand@0,0 {
0961 compatible = "ti,omap2-nand";
0962 reg = <0 0 4>; /* device IO registers */
0963 interrupt-parent = <&gpmc>;
0964 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
0965 <1 IRQ_TYPE_NONE>; /* termcount */
0966 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
0967 ti,nand-xfer-type = "prefetch-dma";
0968 ti,nand-ecc-opt = "bch16";
0969 ti,elm-id = <&elm>;
0970 nand-bus-width = <8>;
0971 gpmc,device-width = <1>;
0972 gpmc,sync-clk-ps = <0>;
0973 gpmc,cs-on-ns = <0>;
0974 gpmc,cs-rd-off-ns = <40>;
0975 gpmc,cs-wr-off-ns = <40>;
0976 gpmc,adv-on-ns = <0>;
0977 gpmc,adv-rd-off-ns = <25>;
0978 gpmc,adv-wr-off-ns = <25>;
0979 gpmc,we-on-ns = <0>;
0980 gpmc,we-off-ns = <20>;
0981 gpmc,oe-on-ns = <3>;
0982 gpmc,oe-off-ns = <30>;
0983 gpmc,access-ns = <30>;
0984 gpmc,rd-cycle-ns = <40>;
0985 gpmc,wr-cycle-ns = <40>;
0986 gpmc,bus-turnaround-ns = <0>;
0987 gpmc,cycle2cycle-delay-ns = <0>;
0988 gpmc,clk-activation-ns = <0>;
0989 gpmc,wr-access-ns = <40>;
0990 gpmc,wr-data-mux-bus-ns = <0>;
0991 /* MTD partition table */
0992 /* All SPL-* partitions are sized to minimal length
0993 * which can be independently programmable. For
0994 * NAND flash this is equal to size of erase-block */
0995 #address-cells = <1>;
0996 #size-cells = <1>;
0997 partition@0 {
0998 label = "NAND.SPL";
0999 reg = <0x00000000 0x00040000>;
1000 };
1001 partition@1 {
1002 label = "NAND.SPL.backup1";
1003 reg = <0x00040000 0x00040000>;
1004 };
1005 partition@2 {
1006 label = "NAND.SPL.backup2";
1007 reg = <0x00080000 0x00040000>;
1008 };
1009 partition@3 {
1010 label = "NAND.SPL.backup3";
1011 reg = <0x000c0000 0x00040000>;
1012 };
1013 partition@4 {
1014 label = "NAND.u-boot-spl-os";
1015 reg = <0x00100000 0x00080000>;
1016 };
1017 partition@5 {
1018 label = "NAND.u-boot";
1019 reg = <0x00180000 0x00100000>;
1020 };
1021 partition@6 {
1022 label = "NAND.u-boot-env";
1023 reg = <0x00280000 0x00040000>;
1024 };
1025 partition@7 {
1026 label = "NAND.u-boot-env.backup1";
1027 reg = <0x002c0000 0x00040000>;
1028 };
1029 partition@8 {
1030 label = "NAND.kernel";
1031 reg = <0x00300000 0x00700000>;
1032 };
1033 partition@9 {
1034 label = "NAND.file-system";
1035 reg = <0x00a00000 0x1f600000>;
1036 };
1037 };
1038 };
1039
1040 &dss {
1041 status = "okay";
1042
1043 pinctrl-names = "default";
1044 pinctrl-0 = <&dss_pins>;
1045
1046 port {
1047 dpi_out: endpoint {
1048 remote-endpoint = <&lcd_in>;
1049 data-lines = <24>;
1050 };
1051 };
1052 };
1053
1054 &dcan0 {
1055 pinctrl-names = "default", "sleep";
1056 pinctrl-0 = <&dcan0_default>;
1057 pinctrl-1 = <&dcan0_sleep>;
1058 status = "okay";
1059 };
1060
1061 &dcan1 {
1062 pinctrl-names = "default", "sleep";
1063 pinctrl-0 = <&dcan1_default>;
1064 pinctrl-1 = <&dcan1_sleep>;
1065 status = "okay";
1066 };
1067
1068 &vpfe0 {
1069 status = "okay";
1070 pinctrl-names = "default", "sleep";
1071 pinctrl-0 = <&vpfe0_pins_default>;
1072 pinctrl-1 = <&vpfe0_pins_sleep>;
1073
1074 port {
1075 vpfe0_ep: endpoint {
1076 remote-endpoint = <&ov2659_1>;
1077 ti,am437x-vpfe-interface = <0>;
1078 bus-width = <8>;
1079 hsync-active = <0>;
1080 vsync-active = <0>;
1081 };
1082 };
1083 };
1084
1085 &vpfe1 {
1086 status = "okay";
1087 pinctrl-names = "default", "sleep";
1088 pinctrl-0 = <&vpfe1_pins_default>;
1089 pinctrl-1 = <&vpfe1_pins_sleep>;
1090
1091 port {
1092 vpfe1_ep: endpoint {
1093 remote-endpoint = <&ov2659_0>;
1094 ti,am437x-vpfe-interface = <0>;
1095 bus-width = <8>;
1096 hsync-active = <0>;
1097 vsync-active = <0>;
1098 };
1099 };
1100 };
1101
1102 &mcasp1 {
1103 #sound-dai-cells = <0>;
1104 pinctrl-names = "default", "sleep";
1105 pinctrl-0 = <&mcasp1_pins>;
1106 pinctrl-1 = <&mcasp1_sleep_pins>;
1107
1108 status = "okay";
1109
1110 op-mode = <0>; /* MCASP_IIS_MODE */
1111 tdm-slots = <2>;
1112 /* 4 serializers */
1113 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
1114 0 0 1 2
1115 >;
1116 tx-num-evt = <32>;
1117 rx-num-evt = <32>;
1118 };
1119
1120 &rtc {
1121 clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
1122 clock-names = "ext-clk", "int-clk";
1123 status = "okay";
1124 };
1125
1126 &cpu {
1127 cpu0-supply = <&dcdc2>;
1128 };
1129
1130 &wkup_m3_ipc {
1131 ti,set-io-isolation;
1132 firmware-name = "am43x-evm-scale-data.bin";
1133 };
1134
1135 &pruss1_mdio {
1136 status = "disabled";
1137 };
