0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Copyright (C) 2015 Toby Churchill - http://www.toby-churchill.com/
0004 */
0005 /dts-v1/;
0006
0007 #include "am33xx.dtsi"
0008 #include <dt-bindings/pwm/pwm.h>
0009 #include <dt-bindings/interrupt-controller/irq.h>
0010
0011 / {
0012 model = "Toby Churchill SL50 Series";
0013 compatible = "tcl,am335x-sl50", "ti,am33xx";
0014
0015 cpus {
0016 cpu@0 {
0017 cpu0-supply = <&dcdc2_reg>;
0018 };
0019 };
0020
0021 memory@80000000 {
0022 device_type = "memory";
0023 reg = <0x80000000 0x20000000>; /* 512 MB */
0024 };
0025
0026 chosen {
0027 stdout-path = &uart0;
0028 };
0029
0030 leds {
0031 compatible = "gpio-leds";
0032 pinctrl-names = "default";
0033 pinctrl-0 = <&led_pins>;
0034
0035 led0 {
0036 label = "sl50:red:usr0";
0037 gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
0038 default-state = "off";
0039 };
0040
0041 led1 {
0042 label = "sl50:green:usr1";
0043 gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
0044 default-state = "off";
0045 };
0046
0047 led2 {
0048 label = "sl50:red:usr2";
0049 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
0050 default-state = "off";
0051 };
0052
0053 led3 {
0054 label = "sl50:green:usr3";
0055 gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
0056 default-state = "off";
0057 };
0058 };
0059
0060 backlight0: disp0 {
0061 compatible = "pwm-backlight";
0062 pinctrl-names = "default";
0063 pinctrl-0 = <&backlight0_pins>;
0064 pwms = <&ehrpwm1 0 500000 PWM_POLARITY_INVERTED>;
0065 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
0066 10 11 12 13 14 15 16 17 18 19
0067 20 21 22 23 24 25 26 27 28 29
0068 30 31 32 33 34 35 36 37 38 39
0069 40 41 42 43 44 45 46 47 48 49
0070 50 51 52 53 54 55 56 57 58 59
0071 60 61 62 63 64 65 66 67 68 69
0072 70 71 72 73 74 75 76 77 78 79
0073 80 81 82 83 84 85 86 87 88 89
0074 90 91 92 93 94 95 96 97 98 99
0075 100>;
0076 default-brightness-level = <50>;
0077 enable-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
0078 power-supply = <&vdd_sys_reg>;
0079 };
0080
0081 backlight1: disp1 {
0082 compatible = "pwm-backlight";
0083 pinctrl-names = "default";
0084 pinctrl-0 = <&backlight1_pins>;
0085 pwms = <&ehrpwm1 1 500000 PWM_POLARITY_INVERTED>;
0086 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
0087 10 11 12 13 14 15 16 17 18 19
0088 20 21 22 23 24 25 26 27 28 29
0089 30 31 32 33 34 35 36 37 38 39
0090 40 41 42 43 44 45 46 47 48 49
0091 50 51 52 53 54 55 56 57 58 59
0092 60 61 62 63 64 65 66 67 68 69
0093 70 71 72 73 74 75 76 77 78 79
0094 80 81 82 83 84 85 86 87 88 89
0095 90 91 92 93 94 95 96 97 98 99
0096 100>;
0097 default-brightness-level = <50>;
0098 enable-gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
0099 power-supply = <&vdd_sys_reg>;
0100 };
0101
0102 clocks {
0103 compatible = "simple-bus";
0104 #address-cells = <1>;
0105 #size-cells = <0>;
0106
0107 /* audio external oscillator */
0108 audio_mclk_fixed: oscillator@0 {
0109 compatible = "fixed-clock";
0110 #clock-cells = <0>;
0111 clock-frequency = <24576000>; /* 24.576MHz */
0112 };
0113
0114 audio_mclk: audio_mclk_gate@0 {
0115 compatible = "gpio-gate-clock";
0116 #clock-cells = <0>;
0117 pinctrl-names = "default";
0118 pinctrl-0 = <&audio_mclk_pins>;
0119 clocks = <&audio_mclk_fixed>;
0120 enable-gpios = <&gpio1 27 0>;
0121 };
0122 };
0123
0124 panel: lcd_panel {
0125 compatible = "ti,tilcdc,panel";
0126 pinctrl-names = "default";
0127 pinctrl-0 = <&lcd_pins>;
0128
0129 panel-info {
0130 ac-bias = <255>;
0131 ac-bias-intrpt = <0>;
0132 dma-burst-sz = <16>;
0133 bpp = <16>;
0134 fdd = <0x80>;
0135 tft-alt-mode = <0>;
0136 mono-8bit-mode = <0>;
0137 sync-edge = <0>;
0138 sync-ctrl = <1>;
0139 raster-order = <0>;
0140 fifo-th = <0>;
0141 };
0142
0143 display-timings {
0144 native-mode = <&timing0>;
0145 timing0: 960x128 {
0146 clock-frequency = <18000000>;
0147 hactive = <960>;
0148 vactive = <272>;
0149
0150 hback-porch = <40>;
0151 hfront-porch = <16>;
0152 hsync-len = <24>;
0153 hsync-active = <0>;
0154
0155 vback-porch = <3>;
0156 vfront-porch = <8>;
0157 vsync-len = <4>;
0158 vsync-active = <0>;
0159 };
0160 };
0161 };
0162
0163 sound {
0164 compatible = "audio-graph-card";
0165 label = "sound-card";
0166 pinctrl-names = "default";
0167 pinctrl-0 = <&audio_pa_pins>;
0168
0169 widgets = "Headphone", "Headphone Jack",
0170 "Speaker", "Speaker External",
0171 "Line", "Line In",
0172 "Microphone", "Microphone Jack";
0173
0174 routing = "Headphone Jack", "HPLOUT",
0175 "Headphone Jack", "HPROUT",
0176 "Amplifier", "MONO_LOUT",
0177 "Speaker External", "Amplifier",
0178 "LINE1R", "Line In",
0179 "LINE1L", "Line In",
0180 "MIC3L", "Microphone Jack",
0181 "MIC3R", "Microphone Jack",
0182 "Microphone Jack", "Mic Bias";
0183
0184 dais = <&cpu_port>;
0185
0186 pa-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
0187 };
0188
0189 emmc_pwrseq: pwrseq@0 {
0190 compatible = "mmc-pwrseq-emmc";
0191 pinctrl-names = "default";
0192 pinctrl-0 = <&emmc_pwrseq_pins>;
0193 reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
0194 };
0195
0196 vdd_sys_reg: regulator@0 {
0197 compatible = "regulator-fixed";
0198 regulator-name = "vdd_sys_reg";
0199 regulator-min-microvolt = <5000000>;
0200 regulator-max-microvolt = <5000000>;
0201 regulator-always-on;
0202 };
0203
0204 vmmcsd_fixed: fixedregulator0 {
0205 compatible = "regulator-fixed";
0206 regulator-name = "vmmcsd_fixed";
0207 regulator-min-microvolt = <3300000>;
0208 regulator-max-microvolt = <3300000>;
0209 };
0210 };
0211
0212 &am33xx_pinmux {
0213 pinctrl-names = "default";
0214 pinctrl-0 = <&lwb_pins>;
0215
0216 audio_pins: pinmux_audio_pins {
0217 pinctrl-single,pins = <
0218 AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLDOWN, MUX_MODE0)
0219 AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_INPUT_PULLDOWN, MUX_MODE0)
0220 AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLDOWN, MUX_MODE0)
0221 AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR0, PIN_INPUT_PULLDOWN, MUX_MODE0)
0222 AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
0223 >;
0224 };
0225
0226 audio_pa_pins: pinmux_audio_pa_pins {
0227 pinctrl-single,pins = <
0228 AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLDOWN, MUX_MODE7) /* SoundPA_en - mcasp0_aclkr.gpio3_18 */
0229 >;
0230 };
0231
0232 audio_mclk_pins: pinmux_audio_mclk_pins {
0233 pinctrl-single,pins = <
0234 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.gpio1_27 */
0235 >;
0236 };
0237
0238 backlight0_pins: pinmux_backlight0_pins {
0239 pinctrl-single,pins = <
0240 AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE7) /* gpmc_wen.gpio2_4 */
0241 >;
0242 };
0243
0244 backlight1_pins: pinmux_backlight1_pins {
0245 pinctrl-single,pins = <
0246 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad10.gpio0_26 */
0247 >;
0248 };
0249
0250 lcd_pins: pinmux_lcd_pins {
0251 pinctrl-single,pins = <
0252 AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
0253 AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
0254 AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
0255 AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
0256 AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
0257 AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
0258 AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
0259 AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
0260 AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
0261 AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
0262 AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
0263 AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
0264 AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
0265 AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
0266 AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
0267 AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
0268 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0269 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0270 AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0271 AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0272 >;
0273 };
0274
0275 led_pins: pinmux_led_pins {
0276 pinctrl-single,pins = <
0277 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7) /* gpmc_a5.gpio1_21 */
0278 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7) /* gpmc_a6.gpio1_22 */
0279 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT, MUX_MODE7) /* gpmc_a7.gpio1_23 */
0280 AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT, MUX_MODE7) /* gpmc_a8.gpio1_24 */
0281 >;
0282 };
0283
0284 uart0_pins: pinmux_uart0_pins {
0285 pinctrl-single,pins = <
0286 AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
0287 AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0288 >;
0289 };
0290
0291 uart1_pins: pinmux_uart1_pins {
0292 pinctrl-single,pins = <
0293 AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
0294 AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0295 >;
0296 };
0297
0298 uart4_pins: pinmux_uart4_pins {
0299 pinctrl-single,pins = <
0300 AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6) /* gpmc_wait0.uart4_rxd */
0301 AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLDOWN, MUX_MODE6) /* gpmc_wpn.uart4_txd */
0302 >;
0303 };
0304
0305 i2c0_pins: pinmux_i2c0_pins {
0306 pinctrl-single,pins = <
0307 AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
0308 AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
0309 >;
0310 };
0311
0312 i2c2_pins: pinmux_i2c2_pins {
0313 pinctrl-single,pins = <
0314 AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_ctsn.i2c2_sda */
0315 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_rtsn.i2c2_scl */
0316 >;
0317 };
0318
0319 cpsw_default: cpsw_default {
0320 pinctrl-single,pins = <
0321 /* Slave 1 */
0322 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE0)
0323 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0324 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE0)
0325 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0326 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0327 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0328 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0329 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
0330 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
0331 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE0)
0332 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLUP, MUX_MODE0)
0333 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE0)
0334 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE0)
0335 >;
0336 };
0337
0338 cpsw_sleep: cpsw_sleep {
0339 pinctrl-single,pins = <
0340 /* Slave 1 reset value */
0341 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
0342 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
0343 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
0344 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
0345 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
0346 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
0347 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
0348 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
0349 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
0350 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
0351 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
0352 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
0353 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
0354 >;
0355 };
0356
0357 davinci_mdio_default: davinci_mdio_default {
0358 pinctrl-single,pins = <
0359 /* MDIO */
0360 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
0361 AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
0362 /* Ethernet */
0363 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE7) /* Ethernet_nRST - gpmc_ad14.gpio1_14 */
0364 >;
0365 };
0366
0367 davinci_mdio_sleep: davinci_mdio_sleep {
0368 pinctrl-single,pins = <
0369 /* MDIO reset value */
0370 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
0371 AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
0372 >;
0373 };
0374
0375 mmc1_pins: pinmux_mmc1_pins {
0376 pinctrl-single,pins = <
0377 AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT, MUX_MODE7) /* uart0_rtsn.gpio1_9 */
0378 >;
0379 };
0380
0381 emmc_pwrseq_pins: pinmux_emmc_pwrseq_pins {
0382 pinctrl-single,pins = <
0383 AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a4.gpio1_20 */
0384 >;
0385 };
0386
0387 emmc_pins: pinmux_emmc_pins {
0388 pinctrl-single,pins = <
0389 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */
0390 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
0391 AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
0392 AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
0393 AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
0394 AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
0395 AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
0396 AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
0397 AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
0398 AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
0399 >;
0400 };
0401
0402 ehrpwm1_pins: pinmux_ehrpwm1a_pins {
0403 pinctrl-single,pins = <
0404 AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT, MUX_MODE6) /* gpmc_a2.ehrpwm1a */
0405 AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT, MUX_MODE6) /* gpmc_a3.ehrpwm1b */
0406 >;
0407 };
0408
0409 rtc0_irq_pins: pinmux_rtc0_irq_pins {
0410 pinctrl-single,pins = <
0411 AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_ad9.gpio0_23 */
0412 >;
0413 };
0414
0415 spi0_pins: pinmux_spi0_pins {
0416 pinctrl-single,pins = <
0417 AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0) /* SPI0_MOSI */
0418 AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0) /* SPI0_MISO */
0419 AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0)
0420 AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0) /* SPI0_CS0 (NBATTSS) */
0421 AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT_PULLUP, MUX_MODE0) /* SPI0_CS1 (FPGA_FLASH_NCS) */
0422 >;
0423 };
0424
0425 lwb_pins: pinmux_lwb_pins {
0426 pinctrl-single,pins = <
0427 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE7) /* nKbdInt - gpmc_ad12.gpio1_12 */
0428 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE7) /* nKbdReset - gpmc_ad13.gpio1_13 */
0429 AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLUP, MUX_MODE7) /* USB1_enPower - gpmc_a1.gpio1_17 */
0430 /* PDI Bus - Battery system */
0431 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLUP, MUX_MODE7) /* nBattReset gpmc_a0.gpio1_16 */
0432 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE7) /* BattPDIData gpmc_ad15.gpio1_15 */
0433 /* FPGA */
0434 AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLUP, MUX_MODE7) /* FPGA_DONE - gpmc_ad8.gpio0_22 */
0435 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLUP, MUX_MODE7) /* FPGA_NRST - gpmc_a0.gpio1_16 */
0436 AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE7) /* FPGA_RUN - gpmc_a1.gpio1_17 */
0437 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLUP, MUX_MODE7) /* ENFPGA - gpmc_a9.gpio1_25 */
0438 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE7) /* FPGA_PROGRAM - gpmc_a10.gpio1_26 */
0439 >;
0440 };
0441 };
0442
0443 &i2c0 {
0444 status = "okay";
0445 pinctrl-names = "default";
0446 pinctrl-0 = <&i2c0_pins>;
0447
0448 clock-frequency = <400000>;
0449
0450 tps: tps@24 {
0451 reg = <0x24>;
0452 };
0453
0454 rtc0: rtc@68 {
0455 compatible = "dallas,ds1339";
0456 pinctrl-names = "default";
0457 pinctrl-0 = <&rtc0_irq_pins>;
0458 interrupt-parent = <&gpio0>;
0459 interrupts = <23 IRQ_TYPE_EDGE_FALLING>; /* gpio 23 */
0460 wakeup-source;
0461 trickle-resistor-ohms = <2000>;
0462 reg = <0x68>;
0463 };
0464
0465 eeprom: eeprom@50 {
0466 compatible = "atmel,24c256";
0467 reg = <0x50>;
0468 };
0469
0470 gpio_exp: mcp23017@20 {
0471 compatible = "microchip,mcp23017";
0472 reg = <0x20>;
0473 };
0474
0475 };
0476
0477 &i2c2 {
0478 status = "okay";
0479 pinctrl-names = "default";
0480 pinctrl-0 = <&i2c2_pins>;
0481
0482 clock-frequency = <400000>;
0483
0484 audio_codec: tlv320aic3106@1b {
0485 status = "okay";
0486 compatible = "ti,tlv320aic3106";
0487 #sound-dai-cells = <0>;
0488 reg = <0x1b>;
0489 ai3x-micbias-vg = <2>; /* 2.5V */
0490
0491 AVDD-supply = <&ldo4_reg>;
0492 IOVDD-supply = <&ldo4_reg>;
0493 DRVDD-supply = <&ldo4_reg>;
0494 DVDD-supply = <&ldo3_reg>;
0495
0496 codec_port: port {
0497 codec_endpoint: endpoint {
0498 remote-endpoint = <&cpu_endpoint>;
0499 clocks = <&audio_mclk>;
0500 };
0501 };
0502 };
0503
0504 /* Ambient Light Sensor */
0505 als: isl29023@44 {
0506 compatible = "isil,isl29023";
0507 reg = <0x44>;
0508 };
0509 };
0510
0511 &rtc {
0512 status = "disabled";
0513 };
0514
0515 &usb0 {
0516 dr_mode = "otg";
0517 };
0518
0519 &usb1 {
0520 dr_mode = "host";
0521 };
0522
0523 &mmc1 {
0524 status = "okay";
0525 pinctrl-names = "default";
0526 pinctrl-0 = <&mmc1_pins>;
0527 bus-width = <4>;
0528 cd-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
0529 vmmc-supply = <&vmmcsd_fixed>;
0530 };
0531
0532 &mmc2 {
0533 status = "okay";
0534 pinctrl-names = "default";
0535 pinctrl-0 = <&emmc_pins>;
0536 bus-width = <8>;
0537 vmmc-supply = <&vmmcsd_fixed>;
0538 mmc-pwrseq = <&emmc_pwrseq>;
0539 };
0540
0541 &mcasp0 {
0542 status = "okay";
0543 pinctrl-names = "default";
0544 pinctrl-0 = <&audio_pins>;
0545 #sound-dai-cells = <0>;
0546 op-mode = <0>; /* MCASP_ISS_MODE */
0547 tdm-slots = <2>;
0548 /* 4 serializers */
0549 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
0550 0 0 1 2
0551 >;
0552 tx-num-evt = <32>;
0553 rx-num-evt = <32>;
0554
0555 cpu_port: port {
0556 cpu_endpoint: endpoint {
0557 remote-endpoint = <&codec_endpoint>;
0558
0559 dai-format = "dsp_b";
0560 bitclock-master = <&codec_port>;
0561 frame-master = <&codec_port>;
0562 bitclock-inversion;
0563 clocks = <&audio_mclk>;
0564 };
0565 };
0566 };
0567
0568 &uart0 {
0569 status = "okay";
0570 pinctrl-names = "default";
0571 pinctrl-0 = <&uart0_pins>;
0572 };
0573
0574 &uart1 {
0575 status = "okay";
0576 pinctrl-names = "default";
0577 pinctrl-0 = <&uart1_pins>;
0578 };
0579
0580 &uart4 {
0581 status = "okay";
0582 pinctrl-names = "default";
0583 pinctrl-0 = <&uart4_pins>;
0584 };
0585
0586 &spi0 {
0587 status = "okay";
0588 pinctrl-names = "default";
0589 pinctrl-0 = <&spi0_pins>;
0590
0591 flash: flash@1 {
0592 #address-cells = <1>;
0593 #size-cells = <1>;
0594 compatible = "micron,n25q032";
0595 reg = <1>;
0596 spi-max-frequency = <5000000>;
0597 };
0598 };
0599
0600 #include "tps65217.dtsi"
0601
0602 &tps {
0603 ti,pmic-shutdown-controller;
0604
0605 interrupt-parent = <&intc>;
0606 interrupts = <7>; /* NNMI */
0607
0608 regulators {
0609 dcdc1_reg: regulator@0 {
0610 /* VDDS_DDR */
0611 regulator-min-microvolt = <1500000>;
0612 regulator-max-microvolt = <1500000>;
0613 regulator-always-on;
0614 };
0615
0616 dcdc2_reg: regulator@1 {
0617 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
0618 regulator-name = "vdd_mpu";
0619 regulator-min-microvolt = <925000>;
0620 regulator-max-microvolt = <1325000>;
0621 regulator-boot-on;
0622 regulator-always-on;
0623 };
0624
0625 dcdc3_reg: regulator@2 {
0626 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
0627 regulator-name = "vdd_core";
0628 regulator-min-microvolt = <925000>;
0629 regulator-max-microvolt = <1150000>;
0630 regulator-boot-on;
0631 regulator-always-on;
0632 };
0633
0634 ldo1_reg: regulator@3 {
0635 /* VRTC / VIO / VDDS*/
0636 regulator-always-on;
0637 regulator-min-microvolt = <1800000>;
0638 regulator-max-microvolt = <1800000>;
0639 };
0640
0641 ldo2_reg: regulator@4 {
0642 /* VDD_3V3AUX */
0643 regulator-always-on;
0644 regulator-min-microvolt = <3300000>;
0645 regulator-max-microvolt = <3300000>;
0646 };
0647
0648 ldo3_reg: regulator@5 {
0649 /* VDD_1V8 */
0650 regulator-min-microvolt = <1800000>;
0651 regulator-max-microvolt = <1800000>;
0652 regulator-always-on;
0653 };
0654
0655 ldo4_reg: regulator@6 {
0656 /* VDD_3V3A */
0657 regulator-min-microvolt = <3300000>;
0658 regulator-max-microvolt = <3300000>;
0659 regulator-always-on;
0660 };
0661 };
0662 };
0663
0664 &cpsw_port1 {
0665 phy-mode = "mii";
0666 phy-handle = <ðphy0>;
0667 ti,dual-emac-pvid = <1>;
0668 };
0669
0670 &cpsw_port2 {
0671 status = "disabled";
0672 };
0673
0674 &mac_sw {
0675 status = "okay";
0676 pinctrl-names = "default", "sleep";
0677 pinctrl-0 = <&cpsw_default>;
0678 pinctrl-1 = <&cpsw_sleep>;
0679 };
0680
0681 &davinci_mdio_sw {
0682 pinctrl-names = "default", "sleep";
0683 pinctrl-0 = <&davinci_mdio_default>;
0684 pinctrl-1 = <&davinci_mdio_sleep>;
0685 reset-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
0686 reset-delay-us = <100>; /* PHY datasheet states 100us min */
0687
0688 ethphy0: ethernet-phy@0 {
0689 reg = <0>;
0690 };
0691 };
0692
0693 &sham {
0694 status = "okay";
0695 };
0696
0697 &aes {
0698 status = "okay";
0699 };
0700
0701 &epwmss1 {
0702 status = "okay";
0703 };
0704
0705 &ehrpwm1 {
0706 status = "okay";
0707 pinctrl-names = "default";
0708 pinctrl-0 = <&ehrpwm1_pins>;
0709 };
0710
0711 &lcdc {
0712 status = "okay";
0713 };
0714
0715 &tscadc {
0716 status = "okay";
0717 };
0718
0719 &am335x_adc {
0720 ti,adc-channels = <0 1 2 3 4 5 6 7>;
0721 };
