0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * am335x-sbc-t335.dts - Device Tree file for Compulab SBC-T335
0004 *
0005 * Copyright (C) 2014 - 2015 CompuLab Ltd. - http://www.compulab.co.il/
0006 */
0007
0008 #include "am335x-cm-t335.dts"
0009
0010 / {
0011 model = "CompuLab CM-T335 on SB-T335";
0012 compatible = "compulab,sbc-t335", "compulab,cm-t335", "ti,am33xx";
0013
0014 /* DRM display driver */
0015 panel {
0016 compatible = "ti,tilcdc,panel";
0017 status = "okay";
0018 pinctrl-names = "default", "sleep";
0019 pinctrl-0 = <&lcd_pins_default>;
0020 pinctrl-1 = <&lcd_pins_sleep>;
0021
0022 panel-info {
0023 ac-bias = <255>;
0024 ac-bias-intrpt = <0>;
0025 dma-burst-sz = <16>;
0026 bpp = <32>;
0027 fdd = <0x80>;
0028 sync-edge = <0>;
0029 sync-ctrl = <1>;
0030 raster-order = <0>;
0031 fifo-th = <0>;
0032 };
0033 display-timings {
0034 /* Timing selection performed by U-Boot */
0035 timing0: lcd {/* 800x480p62 */
0036 clock-frequency = <30000000>;
0037 hactive = <800>;
0038 vactive = <480>;
0039 hfront-porch = <39>;
0040 hback-porch = <39>;
0041 hsync-len = <47>;
0042 vback-porch = <29>;
0043 vfront-porch = <13>;
0044 vsync-len = <2>;
0045 hsync-active = <1>;
0046 vsync-active = <1>;
0047 };
0048 timing1: dvi { /* 1024x768p60 */
0049 clock-frequency = <65000000>;
0050 hactive = <1024>;
0051 hfront-porch = <24>;
0052 hback-porch = <160>;
0053 hsync-len = <136>;
0054 vactive = <768>;
0055 vfront-porch = <3>;
0056 vback-porch = <29>;
0057 vsync-len = <6>;
0058 hsync-active = <0>;
0059 vsync-active = <0>;
0060 };
0061 };
0062 };
0063 };
0064
0065 &am33xx_pinmux {
0066 /* Display */
0067 lcd_pins_default: lcd_pins_default {
0068 pinctrl-single,pins = <
0069 /* gpmc_ad8.lcd_data23 */
0070 AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_OUTPUT, MUX_MODE1)
0071 /* gpmc_ad9.lcd_data22 */
0072 AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_OUTPUT, MUX_MODE1)
0073 /* gpmc_ad10.lcd_data21 */
0074 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE1)
0075 /* gpmc_ad11.lcd_data20 */
0076 AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE1)
0077 /* gpmc_ad12.lcd_data19 */
0078 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT, MUX_MODE1)
0079 /* gpmc_ad13.lcd_data18 */
0080 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_OUTPUT, MUX_MODE1)
0081 /* gpmc_ad14.lcd_data17 */
0082 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_OUTPUT, MUX_MODE1)
0083 /* gpmc_ad15.lcd_data16 */
0084 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_OUTPUT, MUX_MODE1)
0085 AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
0086 AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
0087 AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
0088 AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
0089 AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
0090 AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
0091 AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
0092 AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
0093 AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
0094 AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
0095 AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
0096 AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
0097 AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
0098 AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
0099 AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
0100 AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
0101 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0)
0102 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0)
0103 AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0)
0104 AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0)
0105 >;
0106 };
0107
0108 lcd_pins_sleep: lcd_pins_sleep {
0109 pinctrl-single,pins = <
0110 /* gpmc_ad8.lcd_data23 */
0111 AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLDOWN, MUX_MODE7)
0112 /* gpmc_ad9.lcd_data22 */
0113 AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLDOWN, MUX_MODE7)
0114 /* gpmc_ad10.lcd_data21 */
0115 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLDOWN, MUX_MODE7)
0116 /* gpmc_ad11.lcd_data20 */
0117 AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLDOWN, MUX_MODE7)
0118 /* gpmc_ad12.lcd_data19 */
0119 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLDOWN, MUX_MODE7)
0120 /* gpmc_ad13.lcd_data18 */
0121 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7)
0122 /* gpmc_ad14.lcd_data17 */
0123 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7)
0124 /* gpmc_ad15.lcd_data16 */
0125 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7)
0126 AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PULL_DISABLE, MUX_MODE7)
0127 AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PULL_DISABLE, MUX_MODE7)
0128 AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PULL_DISABLE, MUX_MODE7)
0129 AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PULL_DISABLE, MUX_MODE7)
0130 AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PULL_DISABLE, MUX_MODE7)
0131 AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PULL_DISABLE, MUX_MODE7)
0132 AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PULL_DISABLE, MUX_MODE7)
0133 AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PULL_DISABLE, MUX_MODE7)
0134 AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PULL_DISABLE, MUX_MODE7)
0135 AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PULL_DISABLE, MUX_MODE7)
0136 AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PULL_DISABLE, MUX_MODE7)
0137 AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PULL_DISABLE, MUX_MODE7)
0138 AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PULL_DISABLE, MUX_MODE7)
0139 AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PULL_DISABLE, MUX_MODE7)
0140 AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PULL_DISABLE, MUX_MODE7)
0141 AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PULL_DISABLE, MUX_MODE7)
0142 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)
0143 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)
0144 AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
0145 AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
0146 >;
0147 };
0148 };
0149
0150 &i2c0 {
0151 /* GPIO extender */
0152 gpio_ext: pca9555@26 {
0153 compatible = "nxp,pca9555";
0154 pinctrl-names = "default";
0155 gpio-controller;
0156 #gpio-cells = <2>;
0157 reg = <0x26>;
0158 dvi-ena-hog {
0159 gpio-hog;
0160 gpios = <13 GPIO_ACTIVE_HIGH>;
0161 output-high;
0162 line-name = "dvi-enable";
0163 };
0164 lcd-ena-hog {
0165 gpio-hog;
0166 gpios = <11 GPIO_ACTIVE_HIGH>;
0167 output-high;
0168 line-name = "lcd-enable";
0169 };
0170 };
0171 };
0172
0173 /* Display */
0174 &lcdc {
0175 status = "okay";
0176 };
