0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /* SPDX-FileCopyrightText: Alexander Shiyan, <shc_work@mail.ru> */
0003 /* Based on code by myd_c335x.dts, MYiRtech.com */
0004 /* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ */
0005
0006 /dts-v1/;
0007
0008 #include "am335x-myirtech-myc.dtsi"
0009
0010 #include <dt-bindings/display/tda998x.h>
0011 #include <dt-bindings/input/input.h>
0012
0013 / {
0014 model = "MYIR MYD-AM335X";
0015 compatible = "myir,myd-am335x", "myir,myc-am335x", "ti,am33xx";
0016
0017 chosen {
0018 stdout-path = &uart0;
0019 };
0020
0021 clk12m: clk12m {
0022 compatible = "fixed-clock";
0023 clock-frequency = <12000000>;
0024
0025 #clock-cells = <0>;
0026 };
0027
0028 gpio_buttons: gpio_buttons {
0029 compatible = "gpio-keys";
0030 pinctrl-names = "default";
0031 pinctrl-0 = <&gpio_buttons_pins>;
0032 #address-cells = <1>;
0033 #size-cells = <0>;
0034
0035 button1: button@0 {
0036 reg = <0>;
0037 label = "button1";
0038 linux,code = <BTN_1>;
0039 gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
0040 };
0041
0042 button2: button@1 {
0043 reg = <1>;
0044 label = "button2";
0045 linux,code = <BTN_2>;
0046 gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
0047 };
0048 };
0049
0050 sound: sound {
0051 compatible = "simple-audio-card";
0052 simple-audio-card,format = "i2s";
0053 simple-audio-card,bitclock-master = <&master_codec>;
0054 simple-audio-card,frame-master = <&master_codec>;
0055
0056 simple-audio-card,cpu {
0057 sound-dai = <&mcasp0>;
0058 };
0059
0060 master_codec: simple-audio-card,codec@1 {
0061 sound-dai = <&sgtl5000>;
0062 };
0063
0064 simple-audio-card,codec@2 {
0065 sound-dai = <&tda9988>;
0066 };
0067 };
0068
0069 vdd_5v0: vdd_5v0_reg {
0070 compatible = "regulator-fixed";
0071 regulator-name = "vdd_5v0";
0072 regulator-min-microvolt = <5000000>;
0073 regulator-max-microvolt = <5000000>;
0074 regulator-always-on;
0075 regulator-boot-on;
0076 };
0077
0078 vdd_3v3: vdd_3v3_reg {
0079 compatible = "regulator-fixed";
0080 regulator-name = "vdd-3v3";
0081 regulator-min-microvolt = <3300000>;
0082 regulator-max-microvolt = <3300000>;
0083 regulator-always-on;
0084 regulator-boot-on;
0085 vin-supply = <&vdd_5v0>;
0086 };
0087 };
0088
0089 &cpsw_port2 {
0090 status = "okay";
0091 phy-handle = <&phy1>;
0092 phy-mode = "rgmii-id";
0093 ti,dual-emac-pvid = <2>;
0094 };
0095
0096 &davinci_mdio_sw {
0097 phy1: ethernet-phy@6 {
0098 reg = <6>;
0099 eee-broken-1000t;
0100 };
0101 };
0102
0103 &mac_sw {
0104 pinctrl-0 = <ð_slave1_pins_default>, <ð_slave2_pins_default>;
0105 pinctrl-1 = <ð_slave1_pins_sleep>, <ð_slave2_pins_sleep>;
0106 slaves = <2>;
0107 };
0108
0109 &dcan0 {
0110 pinctrl-names = "default", "sleep";
0111 pinctrl-0 = <&dcan0_pins_default>;
0112 pinctrl-1 = <&dcan0_pins_sleep>;
0113 status = "okay";
0114 };
0115
0116 &dcan1 {
0117 pinctrl-names = "default", "sleep";
0118 pinctrl-0 = <&dcan1_pins_default>;
0119 pinctrl-1 = <&dcan1_pins_sleep>;
0120 status = "okay";
0121 };
0122
0123 &ehrpwm0 {
0124 pinctrl-names = "default", "sleep";
0125 pinctrl-0 = <&ehrpwm0_pins_default>;
0126 pinctrl-1 = <&ehrpwm0_pins_sleep>;
0127 status = "okay";
0128 };
0129
0130 &epwmss0 {
0131 status = "okay";
0132 };
0133
0134 &i2c1 {
0135 pinctrl-names = "default", "gpio", "sleep";
0136 pinctrl-0 = <&i2c1_pins_default>;
0137 pinctrl-1 = <&i2c1_pins_gpio>;
0138 pinctrl-2 = <&i2c1_pins_sleep>;
0139 clock-frequency = <400000>;
0140 scl-gpios = <&gpio0 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
0141 sda-gpios = <&gpio0 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
0142 status = "okay";
0143
0144 sgtl5000: sgtl5000@a {
0145 compatible = "fsl,sgtl5000";
0146 reg =<0xa>;
0147 clocks = <&clk12m>;
0148 micbias-resistor-k-ohms = <4>;
0149 micbias-voltage-m-volts = <2250>;
0150 VDDA-supply = <&vdd_3v3>;
0151 VDDIO-supply = <&vdd_3v3>;
0152
0153 #sound-dai-cells = <0>;
0154 };
0155
0156 tda9988: tda9988@70 {
0157 compatible = "nxp,tda998x";
0158 reg =<0x70>;
0159 audio-ports = <TDA998x_I2S 1>;
0160
0161 #sound-dai-cells = <0>;
0162
0163 ports {
0164 port@0 {
0165 hdmi_0: endpoint@0 {
0166 remote-endpoint = <&lcdc_0>;
0167 };
0168 };
0169 };
0170 };
0171 };
0172
0173 &lcdc {
0174 pinctrl-names = "default", "sleep";
0175 pinctrl-0 = <&lcdc_pins_default>;
0176 pinctrl-1 = <&lcdc_pins_sleep>;
0177 blue-and-red-wiring = "straight";
0178 status = "okay";
0179
0180 port {
0181 lcdc_0: endpoint@0 {
0182 remote-endpoint = <&hdmi_0>;
0183 };
0184 };
0185 };
0186
0187 &leds {
0188 pinctrl-0 = <&led_mod_pins &leds_pins>;
0189
0190 led1: led1 {
0191 label = "base:user1";
0192 gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
0193 color = <LED_COLOR_ID_GREEN>;
0194 default-state = "off";
0195 };
0196
0197 led2: led2 {
0198 label = "base:user2";
0199 gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
0200 color = <LED_COLOR_ID_GREEN>;
0201 default-state = "off";
0202 };
0203 };
0204
0205 &mcasp0 {
0206 pinctrl-names = "default", "sleep";
0207 pinctrl-0 = <&mcasp0_pins_default>;
0208 pinctrl-1 = <&mcasp0_pins_sleep>;
0209 op-mode = <0>;
0210 tdm-slots = <2>;
0211 serial-dir = <0 1 2 0>;
0212 tx-num-evt = <32>;
0213 rx-num-evt = <32>;
0214 status = "okay";
0215
0216 #sound-dai-cells = <0>;
0217 };
0218
0219 &mmc1 {
0220 pinctrl-names = "default", "sleep";
0221 pinctrl-0 = <&mmc1_pins_default>;
0222 pinctrl-1 = <&mmc1_pins_sleep>;
0223 cd-gpios = <&gpio3 21 GPIO_ACTIVE_LOW>;
0224 bus-width = <4>;
0225 vmmc-supply = <&vdd_3v3>;
0226 status = "okay";
0227 };
0228
0229 &nand0 {
0230 nand_parts: partitions {
0231 compatible = "fixed-partitions";
0232 #address-cells = <1>;
0233 #size-cells = <1>;
0234
0235 partition@0 {
0236 label = "MLO";
0237 reg = <0x00000 0x20000>;
0238 };
0239
0240 partition@80000 {
0241 label = "boot";
0242 reg = <0x80000 0x100000>;
0243 };
0244 };
0245 };
0246
0247 &tscadc {
0248 status = "okay";
0249
0250 adc: adc {
0251 ti,adc-channels = <0 1 2 3 4 5 6>;
0252 };
0253 };
0254
0255 &uart0 {
0256 pinctrl-names = "default";
0257 pinctrl-0 = <&uart0_pins>;
0258 status = "okay";
0259 };
0260
0261 &uart1 {
0262 pinctrl-names = "default", "sleep";
0263 pinctrl-0 = <&uart1_pins_default>;
0264 pinctrl-1 = <&uart1_pins_sleep>;
0265 linux,rs485-enabled-at-boot-time;
0266 status = "okay";
0267 };
0268
0269 &uart2 {
0270 pinctrl-names = "default", "sleep";
0271 pinctrl-0 = <&uart2_pins_default>;
0272 pinctrl-1 = <&uart2_pins_sleep>;
0273 status = "okay";
0274 };
0275
0276 &usb {
0277 pinctrl-names = "default";
0278 pinctrl-0 = <&usb_pins>;
0279 };
0280
0281 &usb0 {
0282 dr_mode = "otg";
0283 };
0284
0285 &usb0_phy {
0286 vcc-supply = <&vdd_5v0>;
0287 };
0288
0289 &usb1 {
0290 dr_mode = "host";
0291 };
0292
0293 &usb1_phy {
0294 vcc-supply = <&vdd_5v0>;
0295 };
0296
0297 &vdd_mod {
0298 vin-supply = <&vdd_3v3>;
0299 };
0300
0301 &am33xx_pinmux {
0302 dcan0_pins_default: pinmux_dcan0_pins_default {
0303 pinctrl-single,pins = <
0304 AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_OUTPUT, MUX_MODE2) /* dcan0_tx_mux2 */
0305 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT, MUX_MODE2) /* dcan0_rx_mux2 */
0306 >;
0307 };
0308
0309 dcan0_pins_sleep: pinmux_dcan0_pins_sleep {
0310 pinctrl-single,pins = <
0311 AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE7)
0312 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLDOWN, MUX_MODE7)
0313 >;
0314 };
0315
0316 dcan1_pins_default: pinmux_dcan1_pins_default {
0317 pinctrl-single,pins = <
0318 AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT, MUX_MODE2) /* dcan1_tx_mux0 */
0319 AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT, MUX_MODE2) /* dcan1_rx_mux0 */
0320 >;
0321 };
0322
0323 dcan1_pins_sleep: pinmux_dcan1_pins_sleep {
0324 pinctrl-single,pins = <
0325 AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE7)
0326 AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLDOWN, MUX_MODE7)
0327 >;
0328 };
0329
0330 ehrpwm0_pins_default: pinmux_ehrpwm0_pins_default {
0331 pinctrl-single,pins = <
0332 AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_OUTPUT, MUX_MODE3) /* ehrpwm0A_mux1 */
0333 >;
0334 };
0335
0336 ehrpwm0_pins_sleep: pinmux_ehrpwm0_pins_sleep {
0337 pinctrl-single,pins = <
0338 AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
0339 >;
0340 };
0341
0342 eth_slave2_pins_default: pinmux_eth_slave2_pins_default {
0343 pinctrl-single,pins = <
0344 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_tctl */
0345 AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii2_rctl */
0346 AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_td3 */
0347 AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_td2 */
0348 AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_td1 */
0349 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_td0 */
0350 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_tclk */
0351 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii2_rclk */
0352 AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii2_rd3 */
0353 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii2_rd2 */
0354 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE2 /* rgmii2_rd1 */)
0355 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE2 /* rgmii2_rd0 */)
0356 >;
0357 };
0358
0359 eth_slave2_pins_sleep: pinmux_eth_slave2_pins_sleep {
0360 pinctrl-single,pins = <
0361 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLDOWN, MUX_MODE7)
0362 AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE7)
0363 AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_INPUT_PULLDOWN, MUX_MODE7)
0364 AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_INPUT_PULLDOWN, MUX_MODE7)
0365 AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_INPUT_PULLDOWN, MUX_MODE7)
0366 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_INPUT_PULLDOWN, MUX_MODE7)
0367 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_INPUT_PULLDOWN, MUX_MODE7)
0368 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE7)
0369 AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE7)
0370 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE7)
0371 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE7)
0372 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE7)
0373 >;
0374 };
0375
0376 gpio_buttons_pins: pinmux_gpio_buttons_pins {
0377 pinctrl-single,pins = <
0378 AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpio3[0] */
0379 AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT, MUX_MODE7) /* gpio0[29] */
0380 >;
0381 };
0382
0383 i2c1_pins_default: pinmux_i2c1_pins_default {
0384 pinctrl-single,pins = <
0385 AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT | SLEWCTRL_FAST, MUX_MODE2) /* I2C1_SDA_mux3 */
0386 AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT | SLEWCTRL_FAST, MUX_MODE2) /* I2C1_SCL_mux3 */
0387 >;
0388 };
0389
0390 i2c1_pins_gpio: pinmux_i2c1_pins_gpio {
0391 pinctrl-single,pins = <
0392 AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT, MUX_MODE7) /* gpio0[4] */
0393 AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT, MUX_MODE7) /* gpio0[5] */
0394 >;
0395 };
0396
0397 i2c1_pins_sleep: pinmux_i2c1_pins_sleep {
0398 pinctrl-single,pins = <
0399 AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLDOWN, MUX_MODE7)
0400 AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLDOWN, MUX_MODE7)
0401 >;
0402 };
0403
0404 lcdc_pins_default: pinmux_lcdc_pins_default {
0405 pinctrl-single,pins = <
0406 AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0) /* lcd_data0 */
0407 AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0) /* lcd_data1 */
0408 AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0) /* lcd_data2 */
0409 AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0) /* lcd_data3 */
0410 AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0) /* lcd_data4 */
0411 AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0) /* lcd_data5 */
0412 AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0) /* lcd_data6 */
0413 AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0) /* lcd_data7 */
0414 AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0) /* lcd_data8 */
0415 AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0) /* lcd_data9 */
0416 AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0) /* lcd_data10 */
0417 AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0) /* lcd_data11 */
0418 AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0) /* lcd_data12 */
0419 AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0) /* lcd_data13 */
0420 AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0) /* lcd_data14 */
0421 AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0) /* lcd_data15 */
0422 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0) /* lcd_vsync */
0423 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0) /* lcd_hsync */
0424 AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0) /* lcd_pclk */
0425 AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0) /* lcd_ac_bias_en */
0426 >;
0427 };
0428
0429 lcdc_pins_sleep: pinmux_lcdc_pins_sleep {
0430 pinctrl-single,pins = <
0431 AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PULL_DISABLE, MUX_MODE7)
0432 AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PULL_DISABLE, MUX_MODE7)
0433 AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PULL_DISABLE, MUX_MODE7)
0434 AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PULL_DISABLE, MUX_MODE7)
0435 AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PULL_DISABLE, MUX_MODE7)
0436 AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PULL_DISABLE, MUX_MODE7)
0437 AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PULL_DISABLE, MUX_MODE7)
0438 AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PULL_DISABLE, MUX_MODE7)
0439 AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PULL_DISABLE, MUX_MODE7)
0440 AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PULL_DISABLE, MUX_MODE7)
0441 AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PULL_DISABLE, MUX_MODE7)
0442 AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PULL_DISABLE, MUX_MODE7)
0443 AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PULL_DISABLE, MUX_MODE7)
0444 AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PULL_DISABLE, MUX_MODE7)
0445 AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PULL_DISABLE, MUX_MODE7)
0446 AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PULL_DISABLE, MUX_MODE7)
0447 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)
0448 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)
0449 AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
0450 AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
0451 >;
0452 };
0453
0454 leds_pins: pinmux_leds_pins {
0455 pinctrl-single,pins = <
0456 AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE7) /* gpio0[27] */
0457 AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE7) /* gpio0[3] */
0458 >;
0459 };
0460
0461 mcasp0_pins_default: pinmux_mcasp0_pins_default {
0462 pinctrl-single,pins = <
0463 AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLDOWN, MUX_MODE0) /* mcasp0_aclkx_mux0 */
0464 AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_INPUT_PULLDOWN, MUX_MODE0) /* mcasp0_fsx_mux0 */
0465 AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mcasp0_axr2_mux0 */
0466 AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR1, PIN_INPUT_PULLDOWN, MUX_MODE0) /* mcasp0_axr1_mux0 */
0467 >;
0468 };
0469
0470 mcasp0_pins_sleep: pinmux_mcasp0_pins_sleep {
0471 pinctrl-single,pins = <
0472 AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLDOWN, MUX_MODE7)
0473 AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_INPUT_PULLDOWN, MUX_MODE7)
0474 AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_INPUT_PULLDOWN, MUX_MODE7)
0475 AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR1, PIN_INPUT_PULLDOWN, MUX_MODE7)
0476 >;
0477 };
0478
0479 mmc1_pins_default: pinmux_mmc1_pins_default {
0480 pinctrl-single,pins = <
0481 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_dat3 */
0482 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_dat2 */
0483 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_dat1 */
0484 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_dat0 */
0485 AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_clk */
0486 AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_cmd */
0487 AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE7) /* gpio3[21] */
0488 >;
0489 };
0490
0491 mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
0492 pinctrl-single,pins = <
0493 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLDOWN, MUX_MODE0)
0494 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLDOWN, MUX_MODE0)
0495 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLDOWN, MUX_MODE0)
0496 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLDOWN, MUX_MODE0)
0497 AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLDOWN, MUX_MODE0)
0498 AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLDOWN, MUX_MODE0)
0499 AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLDOWN, MUX_MODE7)
0500 >;
0501 };
0502
0503 uart0_pins: pinmux_uart0_pins {
0504 pinctrl-single,pins = <
0505 AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0) /* uart0_rxd */
0506 AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* uart0_txd */
0507 >;
0508 };
0509
0510 uart1_pins_default: pinmux_uart1_pins_default {
0511 pinctrl-single,pins = <
0512 AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0) /* uart1_rxd */
0513 AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* uart1_txd */
0514 >;
0515 };
0516
0517 uart1_pins_sleep: pinmux_uart1_pins_sleep {
0518 pinctrl-single,pins = <
0519 AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLDOWN, MUX_MODE7)
0520 AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT_PULLDOWN, MUX_MODE7)
0521 >;
0522 };
0523
0524 uart2_pins_default: pinmux_uart2_pins_default {
0525 pinctrl-single,pins = <
0526 AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT, MUX_MODE6) /* uart2_rxd_mux1 */
0527 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_OUTPUT, MUX_MODE6) /* uart2_txd_mux1 */
0528 >;
0529 };
0530
0531 uart2_pins_sleep: pinmux_uart2_pins_sleep {
0532 pinctrl-single,pins = <
0533 AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7)
0534 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
0535 >;
0536 };
0537
0538 usb_pins: pinmux_usb_pins {
0539 pinctrl-single,pins = <
0540 AM33XX_PADCONF(AM335X_PIN_USB0_DRVVBUS, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* USB0_DRVVBUS */
0541 AM33XX_PADCONF(AM335X_PIN_USB1_DRVVBUS, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* USB1_DRVVBUS */
0542 >;
0543 };
0544 };
