0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x
0004 *
0005 * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz
0006 */
0007
0008 /dts-v1/;
0009
0010 #include "am33xx.dtsi"
0011 #include <dt-bindings/interrupt-controller/irq.h>
0012
0013 / {
0014 cpus {
0015 cpu@0 {
0016 cpu0-supply = <&vdd1_reg>;
0017 };
0018 };
0019
0020 memory@80000000 {
0021 device_type = "memory";
0022 reg = <0x80000000 0x10000000>; /* 256 MB */
0023 };
0024
0025 leds {
0026 pinctrl-names = "default";
0027 pinctrl-0 = <&leds_pins>;
0028
0029 compatible = "gpio-leds";
0030
0031 led0 {
0032 label = "com:green:user";
0033 gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
0034 default-state = "on";
0035 };
0036 };
0037
0038 vbat: fixedregulator0 {
0039 compatible = "regulator-fixed";
0040 regulator-name = "vbat";
0041 regulator-min-microvolt = <5000000>;
0042 regulator-max-microvolt = <5000000>;
0043 regulator-boot-on;
0044 };
0045
0046 vmmc: fixedregulator1 {
0047 compatible = "regulator-fixed";
0048 regulator-name = "vmmc";
0049 regulator-min-microvolt = <3300000>;
0050 regulator-max-microvolt = <3300000>;
0051 };
0052 };
0053
0054 &am33xx_pinmux {
0055 i2c0_pins: pinmux_i2c0_pins {
0056 pinctrl-single,pins = <
0057 AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
0058 AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
0059 >;
0060 };
0061
0062 nandflash_pins: pinmux_nandflash_pins {
0063 pinctrl-single,pins = <
0064 AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE0)
0065 AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE0)
0066 AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE0)
0067 AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE0)
0068 AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE0)
0069 AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE0)
0070 AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0)
0071 AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0)
0072 AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0)
0073 AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_wpn.gpio0_31 */
0074 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0)
0075 AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0)
0076 AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0)
0077 AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE0)
0078 AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE0)
0079 >;
0080 };
0081
0082 uart0_pins: pinmux_uart0_pins {
0083 pinctrl-single,pins = <
0084 AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
0085 AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0086 >;
0087 };
0088
0089 leds_pins: pinmux_leds_pins {
0090 pinctrl-single,pins = <
0091 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a7.gpio1_23 */
0092 >;
0093 };
0094 };
0095
0096 &mac_sw {
0097 status = "okay";
0098 };
0099
0100 &davinci_mdio_sw {
0101
0102 ethphy0: ethernet-phy@0 {
0103 reg = <0>;
0104 };
0105
0106 ethphy1: ethernet-phy@1 {
0107 reg = <1>;
0108 };
0109 };
0110
0111 &cpsw_port1 {
0112 phy-handle = <ðphy0>;
0113 phy-mode = "rmii";
0114 ti,dual-emac-pvid = <1>;
0115 };
0116
0117 &cpsw_port2 {
0118 phy-handle = <ðphy1>;
0119 phy-mode = "rmii";
0120 ti,dual-emac-pvid = <2>;
0121 };
0122
0123 &elm {
0124 status = "okay";
0125 };
0126
0127 &gpmc {
0128 status = "okay";
0129 pinctrl-names = "default";
0130 pinctrl-0 = <&nandflash_pins>;
0131
0132 ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
0133
0134 nand@0,0 {
0135 compatible = "ti,omap2-nand";
0136 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
0137 interrupt-parent = <&gpmc>;
0138 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
0139 <1 IRQ_TYPE_NONE>; /* termcount */
0140 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
0141 nand-bus-width = <8>;
0142 ti,nand-ecc-opt = "bch8";
0143 gpmc,device-width = <1>;
0144 gpmc,sync-clk-ps = <0>;
0145 gpmc,cs-on-ns = <0>;
0146 gpmc,cs-rd-off-ns = <44>;
0147 gpmc,cs-wr-off-ns = <44>;
0148 gpmc,adv-on-ns = <6>;
0149 gpmc,adv-rd-off-ns = <34>;
0150 gpmc,adv-wr-off-ns = <44>;
0151 gpmc,we-on-ns = <0>;
0152 gpmc,we-off-ns = <40>;
0153 gpmc,oe-on-ns = <0>;
0154 gpmc,oe-off-ns = <54>;
0155 gpmc,access-ns = <64>;
0156 gpmc,rd-cycle-ns = <82>;
0157 gpmc,wr-cycle-ns = <82>;
0158 gpmc,bus-turnaround-ns = <0>;
0159 gpmc,cycle2cycle-delay-ns = <0>;
0160 gpmc,clk-activation-ns = <0>;
0161 gpmc,wr-access-ns = <40>;
0162 gpmc,wr-data-mux-bus-ns = <0>;
0163
0164 #address-cells = <1>;
0165 #size-cells = <1>;
0166 ti,elm-id = <&elm>;
0167
0168 /* MTD partition table */
0169 partition@0 {
0170 label = "SPL";
0171 reg = <0x00000000 0x000080000>;
0172 };
0173
0174 partition@1 {
0175 label = "U-boot";
0176 reg = <0x00080000 0x001e0000>;
0177 };
0178
0179 partition@2 {
0180 label = "U-Boot Env";
0181 reg = <0x00260000 0x00020000>;
0182 };
0183
0184 partition@3 {
0185 label = "Kernel";
0186 reg = <0x00280000 0x00500000>;
0187 };
0188
0189 partition@4 {
0190 label = "File System";
0191 reg = <0x00780000 0x007880000>;
0192 };
0193 };
0194 };
0195
0196 &i2c0 {
0197 status = "okay";
0198 pinctrl-names = "default";
0199 pinctrl-0 = <&i2c0_pins>;
0200
0201 clock-frequency = <400000>;
0202
0203 tps: tps@2d {
0204 reg = <0x2d>;
0205 };
0206 };
0207
0208 &mmc1 {
0209 status = "okay";
0210 vmmc-supply = <&vmmc>;
0211 bus-width = <4>;
0212 };
0213
0214 &uart0 {
0215 status = "okay";
0216 pinctrl-names = "default";
0217 pinctrl-0 = <&uart0_pins>;
0218 };
0219
0220 &usb1 {
0221 dr_mode = "host";
0222 };
0223
0224 #include "tps65910.dtsi"
0225
0226 &tps {
0227 vcc1-supply = <&vbat>;
0228 vcc2-supply = <&vbat>;
0229 vcc3-supply = <&vbat>;
0230 vcc4-supply = <&vbat>;
0231 vcc5-supply = <&vbat>;
0232 vcc6-supply = <&vbat>;
0233 vcc7-supply = <&vbat>;
0234 vccio-supply = <&vbat>;
0235
0236 regulators {
0237 vrtc_reg: regulator@0 {
0238 regulator-always-on;
0239 };
0240
0241 vio_reg: regulator@1 {
0242 regulator-always-on;
0243 };
0244
0245 vdd1_reg: regulator@2 {
0246 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
0247 regulator-name = "vdd_mpu";
0248 regulator-min-microvolt = <912500>;
0249 regulator-max-microvolt = <1312500>;
0250 regulator-boot-on;
0251 regulator-always-on;
0252 };
0253
0254 vdd2_reg: regulator@3 {
0255 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
0256 regulator-name = "vdd_core";
0257 regulator-min-microvolt = <912500>;
0258 regulator-max-microvolt = <1150000>;
0259 regulator-boot-on;
0260 regulator-always-on;
0261 };
0262
0263 vdd3_reg: regulator@4 {
0264 regulator-always-on;
0265 };
0266
0267 vdig1_reg: regulator@5 {
0268 regulator-always-on;
0269 };
0270
0271 vdig2_reg: regulator@6 {
0272 regulator-always-on;
0273 };
0274
0275 vpll_reg: regulator@7 {
0276 regulator-always-on;
0277 };
0278
0279 vdac_reg: regulator@8 {
0280 regulator-always-on;
0281 };
0282
0283 vaux1_reg: regulator@9 {
0284 regulator-always-on;
0285 };
0286
0287 vaux2_reg: regulator@10 {
0288 regulator-always-on;
0289 };
0290
0291 vaux33_reg: regulator@11 {
0292 regulator-always-on;
0293 };
0294
0295 vmmc_reg: regulator@12 {
0296 regulator-always-on;
0297 };
0298 };
0299 };
0300
