0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
0004 */
0005
0006 /*
0007 * AM335x ICE V2 board
0008 * http://www.ti.com/tool/tmdsice3359
0009 */
0010
0011 /dts-v1/;
0012
0013 #include "am33xx.dtsi"
0014
0015 / {
0016 model = "TI AM3359 ICE-V2";
0017 compatible = "ti,am3359-icev2", "ti,am33xx";
0018
0019 memory@80000000 {
0020 device_type = "memory";
0021 reg = <0x80000000 0x10000000>; /* 256 MB */
0022 };
0023
0024 chosen {
0025 stdout-path = &uart3;
0026 };
0027
0028 vbat: fixedregulator0 {
0029 compatible = "regulator-fixed";
0030 regulator-name = "vbat";
0031 regulator-min-microvolt = <5000000>;
0032 regulator-max-microvolt = <5000000>;
0033 regulator-boot-on;
0034 };
0035
0036 vtt_fixed: fixedregulator1 {
0037 compatible = "regulator-fixed";
0038 regulator-name = "vtt";
0039 regulator-min-microvolt = <1500000>;
0040 regulator-max-microvolt = <1500000>;
0041 gpio = <&gpio0 18 GPIO_ACTIVE_HIGH>;
0042 regulator-always-on;
0043 regulator-boot-on;
0044 enable-active-high;
0045 };
0046
0047 leds-iio {
0048 status = "disabled";
0049 compatible = "gpio-leds";
0050 led-out0 {
0051 label = "out0";
0052 gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
0053 default-state = "off";
0054 };
0055
0056 led-out1 {
0057 label = "out1";
0058 gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
0059 default-state = "off";
0060 };
0061
0062 led-out2 {
0063 label = "out2";
0064 gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
0065 default-state = "off";
0066 };
0067
0068 led-out3 {
0069 label = "out3";
0070 gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
0071 default-state = "off";
0072 };
0073
0074 led-out4 {
0075 label = "out4";
0076 gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
0077 default-state = "off";
0078 };
0079
0080 led-out5 {
0081 label = "out5";
0082 gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
0083 default-state = "off";
0084 };
0085
0086 led-out6 {
0087 label = "out6";
0088 gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
0089 default-state = "off";
0090 };
0091
0092 led-out7 {
0093 label = "out7";
0094 gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
0095 default-state = "off";
0096 };
0097 };
0098
0099 /* Tricolor status LEDs */
0100 leds1 {
0101 compatible = "gpio-leds";
0102 pinctrl-names = "default";
0103 pinctrl-0 = <&user_leds>;
0104
0105 led0 {
0106 label = "status0:red:cpu0";
0107 gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
0108 default-state = "off";
0109 linux,default-trigger = "cpu0";
0110 };
0111
0112 led1 {
0113 label = "status0:green:usr";
0114 gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
0115 default-state = "off";
0116 };
0117
0118 led2 {
0119 label = "status0:yellow:usr";
0120 gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>;
0121 default-state = "off";
0122 };
0123
0124 led3 {
0125 label = "status1:red:mmc0";
0126 gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
0127 default-state = "off";
0128 linux,default-trigger = "mmc0";
0129 };
0130
0131 led4 {
0132 label = "status1:green:usr";
0133 gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
0134 default-state = "off";
0135 };
0136
0137 led5 {
0138 label = "status1:yellow:usr";
0139 gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
0140 default-state = "off";
0141 };
0142 };
0143 gpio-decoder {
0144 compatible = "gpio-decoder";
0145 gpios = <&pca9536 3 GPIO_ACTIVE_HIGH>,
0146 <&pca9536 2 GPIO_ACTIVE_HIGH>,
0147 <&pca9536 1 GPIO_ACTIVE_HIGH>,
0148 <&pca9536 0 GPIO_ACTIVE_HIGH>;
0149 linux,axis = <0>; /* ABS_X */
0150 decoder-max-value = <9>;
0151 };
0152 };
0153
0154 &am33xx_pinmux {
0155 user_leds: user_leds {
0156 pinctrl-single,pins = <
0157 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT, MUX_MODE7) /* (J18) gmii1_txd3.gpio0[16] */
0158 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT, MUX_MODE7) /* (K15) gmii1_txd2.gpio0[17] */
0159 AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT, MUX_MODE7) /* (A15) xdma_event_intr0.gpio0[19] */
0160 AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT, MUX_MODE7) /* (D14) xdma_event_intr1.gpio0[20] */
0161 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_OUTPUT, MUX_MODE7) /* (U9) gpmc_csn1.gpio1[30] */
0162 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT, MUX_MODE7) /* (K18) gmii1_txclk.gpio3[9] */
0163 >;
0164 };
0165
0166 mmc0_pins_default: mmc0_pins_default {
0167 pinctrl-single,pins = <
0168 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
0169 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
0170 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
0171 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
0172 AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
0173 AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
0174 >;
0175 };
0176
0177 i2c0_pins_default: i2c0_pins_default {
0178 pinctrl-single,pins = <
0179 AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT, MUX_MODE0)
0180 AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT, MUX_MODE0)
0181 >;
0182 };
0183
0184 spi0_pins_default: spi0_pins_default {
0185 pinctrl-single,pins = <
0186 AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0)
0187 AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0)
0188 AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0)
0189 AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0)
0190 AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT_PULLUP, MUX_MODE0)
0191 AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLUP, MUX_MODE7) /* (B12) mcasp0_aclkr.gpio3[18] */
0192 >;
0193 };
0194
0195 uart3_pins_default: uart3_pins_default {
0196 pinctrl-single,pins = <
0197 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE1) /* (L17) gmii1_rxd3.uart3_rxd */
0198 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_OUTPUT_PULLUP, MUX_MODE1) /* (L16) gmii1_rxd2.uart3_txd */
0199 >;
0200 };
0201
0202 cpsw_default: cpsw_default {
0203 pinctrl-single,pins = <
0204 /* Slave 1, RMII mode */
0205 AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLUP, MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
0206 AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
0207 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE1)
0208 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE1)
0209 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */
0210 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
0211 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
0212 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_txen.rmii1_txen */
0213 /* Slave 2, RMII mode */
0214 AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_wait0.rmii2_crs_dv */
0215 AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLUP, MUX_MODE1) /* mii1_col.rmii2_refclk */
0216 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_a11.rmii2_rxd0 */
0217 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_a10.rmii2_rxd1 */
0218 AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_wpn.rmii2_rxerr */
0219 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* gpmc_a5.rmii2_txd0 */
0220 AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* gpmc_a4.rmii2_txd1 */
0221 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* gpmc_a0.rmii2_txen */
0222 >;
0223 };
0224
0225 cpsw_sleep: cpsw_sleep {
0226 pinctrl-single,pins = <
0227 /* Slave 1 reset value */
0228 AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7)
0229 AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
0230 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
0231 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
0232 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
0233 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
0234 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
0235 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
0236
0237 /* Slave 2 reset value */
0238 AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLDOWN, MUX_MODE7)
0239 AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE7)
0240 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE7)
0241 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE7)
0242 AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLDOWN, MUX_MODE7)
0243 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_INPUT_PULLDOWN, MUX_MODE7)
0244 AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_INPUT_PULLDOWN, MUX_MODE7)
0245 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLDOWN, MUX_MODE7)
0246 >;
0247 };
0248
0249 davinci_mdio_default: davinci_mdio_default {
0250 pinctrl-single,pins = <
0251 /* MDIO */
0252 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
0253 AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
0254 >;
0255 };
0256
0257 davinci_mdio_sleep: davinci_mdio_sleep {
0258 pinctrl-single,pins = <
0259 /* MDIO reset value */
0260 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
0261 AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
0262 >;
0263 };
0264 };
0265
0266 &i2c0 {
0267 pinctrl-names = "default";
0268 pinctrl-0 = <&i2c0_pins_default>;
0269
0270 status = "okay";
0271 clock-frequency = <400000>;
0272
0273 tps: power-controller@2d {
0274 reg = <0x2d>;
0275 };
0276
0277 tpic2810: gpio@60 {
0278 compatible = "ti,tpic2810";
0279 reg = <0x60>;
0280 gpio-controller;
0281 #gpio-cells = <2>;
0282 };
0283
0284 pca9536: gpio@41 {
0285 compatible = "ti,pca9536";
0286 reg = <0x41>;
0287 gpio-controller;
0288 #gpio-cells = <2>;
0289 };
0290
0291 /* osd9616p0899-10 */
0292 display@3c {
0293 compatible = "solomon,ssd1306fb-i2c";
0294 reg = <0x3c>;
0295 solomon,height = <16>;
0296 solomon,width = <96>;
0297 solomon,com-seq;
0298 solomon,com-invdir;
0299 solomon,page-offset = <0>;
0300 solomon,prechargep1 = <2>;
0301 solomon,prechargep2 = <13>;
0302 };
0303 };
0304
0305 &spi0 {
0306 status = "okay";
0307 pinctrl-names = "default";
0308 pinctrl-0 = <&spi0_pins_default>;
0309
0310 sn65hvs882@1 {
0311 compatible = "pisosr-gpio";
0312 gpio-controller;
0313 #gpio-cells = <2>;
0314
0315 load-gpios = <&gpio3 18 GPIO_ACTIVE_LOW>;
0316
0317 reg = <1>;
0318 spi-max-frequency = <1000000>;
0319 spi-cpol;
0320 };
0321
0322 spi_nor: flash@0 {
0323 #address-cells = <1>;
0324 #size-cells = <1>;
0325 compatible = "winbond,w25q64", "jedec,spi-nor";
0326 spi-max-frequency = <80000000>;
0327 m25p,fast-read;
0328 reg = <0>;
0329
0330 partition@0 {
0331 label = "u-boot-spl";
0332 reg = <0x0 0x80000>;
0333 read-only;
0334 };
0335
0336 partition@1 {
0337 label = "u-boot";
0338 reg = <0x80000 0x100000>;
0339 read-only;
0340 };
0341
0342 partition@2 {
0343 label = "u-boot-env";
0344 reg = <0x180000 0x20000>;
0345 read-only;
0346 };
0347
0348 partition@3 {
0349 label = "misc";
0350 reg = <0x1A0000 0x660000>;
0351 };
0352 };
0353
0354 };
0355
0356 &tscadc {
0357 status = "okay";
0358 adc {
0359 ti,adc-channels = <1 2 3 4 5 6 7>;
0360 };
0361 };
0362
0363 #include "tps65910.dtsi"
0364
0365 &tps {
0366 vcc1-supply = <&vbat>;
0367 vcc2-supply = <&vbat>;
0368 vcc3-supply = <&vbat>;
0369 vcc4-supply = <&vbat>;
0370 vcc5-supply = <&vbat>;
0371 vcc6-supply = <&vbat>;
0372 vcc7-supply = <&vbat>;
0373 vccio-supply = <&vbat>;
0374
0375 regulators {
0376 vrtc_reg: regulator@0 {
0377 regulator-always-on;
0378 };
0379
0380 vio_reg: regulator@1 {
0381 regulator-always-on;
0382 };
0383
0384 vdd1_reg: regulator@2 {
0385 regulator-name = "vdd_mpu";
0386 regulator-min-microvolt = <912500>;
0387 regulator-max-microvolt = <1326000>;
0388 regulator-boot-on;
0389 regulator-always-on;
0390 };
0391
0392 vdd2_reg: regulator@3 {
0393 regulator-name = "vdd_core";
0394 regulator-min-microvolt = <912500>;
0395 regulator-max-microvolt = <1144000>;
0396 regulator-boot-on;
0397 regulator-always-on;
0398 };
0399
0400 vdd3_reg: regulator@4 {
0401 regulator-always-on;
0402 };
0403
0404 vdig1_reg: regulator@5 {
0405 regulator-always-on;
0406 };
0407
0408 vdig2_reg: regulator@6 {
0409 regulator-always-on;
0410 };
0411
0412 vpll_reg: regulator@7 {
0413 regulator-always-on;
0414 };
0415
0416 vdac_reg: regulator@8 {
0417 regulator-always-on;
0418 };
0419
0420 vaux1_reg: regulator@9 {
0421 regulator-always-on;
0422 };
0423
0424 vaux2_reg: regulator@10 {
0425 regulator-always-on;
0426 };
0427
0428 vaux33_reg: regulator@11 {
0429 regulator-always-on;
0430 };
0431
0432 vmmc_reg: regulator@12 {
0433 regulator-min-microvolt = <1800000>;
0434 regulator-max-microvolt = <3300000>;
0435 regulator-always-on;
0436 };
0437 };
0438 };
0439
0440 &mmc1 {
0441 status = "okay";
0442 vmmc-supply = <&vmmc_reg>;
0443 bus-width = <4>;
0444 pinctrl-names = "default";
0445 pinctrl-0 = <&mmc0_pins_default>;
0446 };
0447
0448 &gpio0_target {
0449 /* Do not idle the GPIO used for holding the VTT regulator */
0450 ti,no-reset-on-init;
0451 ti,no-idle-on-init;
0452 };
0453
0454 &uart3 {
0455 pinctrl-names = "default";
0456 pinctrl-0 = <&uart3_pins_default>;
0457 status = "okay";
0458 };
0459
0460 &gpio3 {
0461 pr1-mii-ctl-hog {
0462 gpio-hog;
0463 gpios = <4 GPIO_ACTIVE_HIGH>;
0464 output-high;
0465 line-name = "PR1_MII_CTRL";
0466 };
0467
0468 mux-mii-hog {
0469 gpio-hog;
0470 gpios = <10 GPIO_ACTIVE_HIGH>;
0471 /* ETH1 mux: Low for MII-PRU, high for RMII-CPSW */
0472 output-high;
0473 line-name = "MUX_MII_CTL1";
0474 };
0475 };
0476
0477 &cpsw_port1 {
0478 phy-handle = <ðphy0>;
0479 phy-mode = "rmii";
0480 ti,dual-emac-pvid = <1>;
0481 };
0482
0483 &cpsw_port2 {
0484 phy-handle = <ðphy1>;
0485 phy-mode = "rmii";
0486 ti,dual-emac-pvid = <2>;
0487 };
0488
0489 &mac_sw {
0490 pinctrl-names = "default", "sleep";
0491 pinctrl-0 = <&cpsw_default>;
0492 pinctrl-1 = <&cpsw_sleep>;
0493 status = "okay";
0494 };
0495
0496 &davinci_mdio_sw {
0497 pinctrl-names = "default", "sleep";
0498 pinctrl-0 = <&davinci_mdio_default>;
0499 pinctrl-1 = <&davinci_mdio_sleep>;
0500 reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
0501 reset-delay-us = <2>; /* PHY datasheet states 1uS min */
0502
0503 ethphy0: ethernet-phy@1 {
0504 reg = <1>;
0505 };
0506
0507 ethphy1: ethernet-phy@3 {
0508 reg = <3>;
0509 };
0510 };
0511
0512 &pruss_tm {
0513 status = "okay";
0514 };
0515
0516 &rtc {
0517 system-power-controller;
0518 };
