0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
0004 */
0005
0006 /*
0007 * AM335x Starter Kit
0008 * http://www.ti.com/tool/tmdssk3358
0009 */
0010
0011 /dts-v1/;
0012
0013 #include "am33xx.dtsi"
0014 #include <dt-bindings/pwm/pwm.h>
0015 #include <dt-bindings/interrupt-controller/irq.h>
0016
0017 / {
0018 model = "TI AM335x EVM-SK";
0019 compatible = "ti,am335x-evmsk", "ti,am33xx";
0020
0021 cpus {
0022 cpu@0 {
0023 cpu0-supply = <&vdd1_reg>;
0024 };
0025 };
0026
0027 memory@80000000 {
0028 device_type = "memory";
0029 reg = <0x80000000 0x10000000>; /* 256 MB */
0030 };
0031
0032 chosen {
0033 stdout-path = &uart0;
0034 };
0035
0036 vbat: fixedregulator0 {
0037 compatible = "regulator-fixed";
0038 regulator-name = "vbat";
0039 regulator-min-microvolt = <5000000>;
0040 regulator-max-microvolt = <5000000>;
0041 regulator-boot-on;
0042 };
0043
0044 lis3_reg: fixedregulator1 {
0045 compatible = "regulator-fixed";
0046 regulator-name = "lis3_reg";
0047 regulator-boot-on;
0048 };
0049
0050 wl12xx_vmmc: fixedregulator2 {
0051 pinctrl-names = "default";
0052 pinctrl-0 = <&wl12xx_gpio>;
0053 compatible = "regulator-fixed";
0054 regulator-name = "vwl1271";
0055 regulator-min-microvolt = <1800000>;
0056 regulator-max-microvolt = <1800000>;
0057 gpio = <&gpio1 29 0>;
0058 startup-delay-us = <70000>;
0059 enable-active-high;
0060 };
0061
0062 vtt_fixed: fixedregulator3 {
0063 compatible = "regulator-fixed";
0064 regulator-name = "vtt";
0065 regulator-min-microvolt = <1500000>;
0066 regulator-max-microvolt = <1500000>;
0067 gpio = <&gpio0 7 GPIO_ACTIVE_HIGH>;
0068 regulator-always-on;
0069 regulator-boot-on;
0070 enable-active-high;
0071 };
0072
0073 /* TPS79518 */
0074 v1_8d_reg: fixedregulator-v1_8d {
0075 compatible = "regulator-fixed";
0076 regulator-name = "v1_8d";
0077 vin-supply = <&vbat>;
0078 regulator-min-microvolt = <1800000>;
0079 regulator-max-microvolt = <1800000>;
0080 };
0081
0082 /* TPS78633 */
0083 v3_3d_reg: fixedregulator-v3_3d {
0084 compatible = "regulator-fixed";
0085 regulator-name = "v3_3d";
0086 vin-supply = <&vbat>;
0087 regulator-min-microvolt = <3300000>;
0088 regulator-max-microvolt = <3300000>;
0089 };
0090
0091 leds {
0092 pinctrl-names = "default";
0093 pinctrl-0 = <&user_leds_s0>;
0094
0095 compatible = "gpio-leds";
0096
0097 led1 {
0098 label = "evmsk:green:usr0";
0099 gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
0100 default-state = "off";
0101 };
0102
0103 led2 {
0104 label = "evmsk:green:usr1";
0105 gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
0106 default-state = "off";
0107 };
0108
0109 led3 {
0110 label = "evmsk:green:mmc0";
0111 gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
0112 linux,default-trigger = "mmc0";
0113 default-state = "off";
0114 };
0115
0116 led4 {
0117 label = "evmsk:green:heartbeat";
0118 gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
0119 linux,default-trigger = "heartbeat";
0120 default-state = "off";
0121 };
0122 };
0123
0124 gpio_buttons: gpio_buttons0 {
0125 compatible = "gpio-keys";
0126 #address-cells = <1>;
0127 #size-cells = <0>;
0128
0129 switch1 {
0130 label = "button0";
0131 linux,code = <0x100>;
0132 gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
0133 };
0134
0135 switch2 {
0136 label = "button1";
0137 linux,code = <0x101>;
0138 gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
0139 };
0140
0141 switch3 {
0142 label = "button2";
0143 linux,code = <0x102>;
0144 gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
0145 wakeup-source;
0146 };
0147
0148 switch4 {
0149 label = "button3";
0150 linux,code = <0x103>;
0151 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
0152 };
0153 };
0154
0155 lcd_bl: backlight {
0156 compatible = "pwm-backlight";
0157 pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>;
0158 brightness-levels = <0 58 61 66 75 90 125 170 255>;
0159 default-brightness-level = <8>;
0160 };
0161
0162 sound {
0163 compatible = "simple-audio-card";
0164 simple-audio-card,name = "AM335x-EVMSK";
0165 simple-audio-card,widgets =
0166 "Headphone", "Headphone Jack";
0167 simple-audio-card,routing =
0168 "Headphone Jack", "HPLOUT",
0169 "Headphone Jack", "HPROUT";
0170 simple-audio-card,format = "dsp_b";
0171 simple-audio-card,bitclock-master = <&sound_master>;
0172 simple-audio-card,frame-master = <&sound_master>;
0173 simple-audio-card,bitclock-inversion;
0174
0175 simple-audio-card,cpu {
0176 sound-dai = <&mcasp1>;
0177 };
0178
0179 sound_master: simple-audio-card,codec {
0180 sound-dai = <&tlv320aic3106>;
0181 system-clock-frequency = <24000000>;
0182 };
0183 };
0184
0185 panel {
0186 compatible = "newhaven,nhd-4.3-480272ef-atxl";
0187
0188 pinctrl-names = "default", "sleep";
0189 pinctrl-0 = <&lcd_pins_default>;
0190 pinctrl-1 = <&lcd_pins_sleep>;
0191 backlight = <&lcd_bl>;
0192
0193 port {
0194 panel_0: endpoint@0 {
0195 remote-endpoint = <&lcdc_0>;
0196 };
0197 };
0198 };
0199 };
0200
0201 &am33xx_pinmux {
0202 pinctrl-names = "default";
0203 pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>;
0204
0205 lcd_pins_default: lcd_pins_default {
0206 pinctrl-single,pins = <
0207 AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad8.lcd_data23 */
0208 AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad9.lcd_data22 */
0209 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad10.lcd_data21 */
0210 AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad11.lcd_data20 */
0211 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad12.lcd_data19 */
0212 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad13.lcd_data18 */
0213 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad14.lcd_data17 */
0214 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad15.lcd_data16 */
0215 AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
0216 AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
0217 AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
0218 AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
0219 AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
0220 AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
0221 AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
0222 AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
0223 AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
0224 AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
0225 AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
0226 AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
0227 AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
0228 AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
0229 AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
0230 AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
0231 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0)
0232 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0)
0233 AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0)
0234 AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0)
0235 >;
0236 };
0237
0238 lcd_pins_sleep: lcd_pins_sleep {
0239 pinctrl-single,pins = <
0240 AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad8.lcd_data23 */
0241 AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad9.lcd_data22 */
0242 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad10.lcd_data21 */
0243 AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad11.lcd_data20 */
0244 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad12.lcd_data19 */
0245 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad13.lcd_data18 */
0246 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad14.lcd_data17 */
0247 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad15.lcd_data16 */
0248 AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PULL_DISABLE, MUX_MODE7)
0249 AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PULL_DISABLE, MUX_MODE7)
0250 AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PULL_DISABLE, MUX_MODE7)
0251 AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PULL_DISABLE, MUX_MODE7)
0252 AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PULL_DISABLE, MUX_MODE7)
0253 AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PULL_DISABLE, MUX_MODE7)
0254 AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PULL_DISABLE, MUX_MODE7)
0255 AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PULL_DISABLE, MUX_MODE7)
0256 AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PULL_DISABLE, MUX_MODE7)
0257 AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PULL_DISABLE, MUX_MODE7)
0258 AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PULL_DISABLE, MUX_MODE7)
0259 AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PULL_DISABLE, MUX_MODE7)
0260 AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PULL_DISABLE, MUX_MODE7)
0261 AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PULL_DISABLE, MUX_MODE7)
0262 AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PULL_DISABLE, MUX_MODE7)
0263 AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PULL_DISABLE, MUX_MODE7)
0264 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)
0265 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)
0266 AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
0267 AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
0268 >;
0269 };
0270
0271
0272 user_leds_s0: user_leds_s0 {
0273 pinctrl-single,pins = <
0274 AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad4.gpio1_4 */
0275 AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad5.gpio1_5 */
0276 AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad6.gpio1_6 */
0277 AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad7.gpio1_7 */
0278 >;
0279 };
0280
0281 gpio_keys_s0: gpio_keys_s0 {
0282 pinctrl-single,pins = <
0283 AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */
0284 AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */
0285 AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_wait0.gpio0_30 */
0286 AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */
0287 >;
0288 };
0289
0290 i2c0_pins: pinmux_i2c0_pins {
0291 pinctrl-single,pins = <
0292 AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
0293 AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
0294 >;
0295 };
0296
0297 uart0_pins: pinmux_uart0_pins {
0298 pinctrl-single,pins = <
0299 AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
0300 AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0301 >;
0302 };
0303
0304 clkout2_pin: pinmux_clkout2_pin {
0305 pinctrl-single,pins = <
0306 AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* xdma_event_intr1.clkout2 */
0307 >;
0308 };
0309
0310 ecap2_pins: backlight_pins {
0311 pinctrl-single,pins = <
0312 AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, 0x0, MUX_MODE4) /* mcasp0_ahclkr.ecap2_in_pwm2_out */
0313 >;
0314 };
0315
0316 cpsw_default: cpsw_default {
0317 pinctrl-single,pins = <
0318 /* Slave 1 */
0319 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl */
0320 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
0321 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
0322 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
0323 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
0324 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
0325 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
0326 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
0327 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
0328 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
0329 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
0330 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
0331
0332 /* Slave 2 */
0333 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
0334 AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
0335 AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
0336 AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
0337 AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
0338 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
0339 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
0340 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
0341 AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
0342 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
0343 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
0344 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
0345 >;
0346 };
0347
0348 cpsw_sleep: cpsw_sleep {
0349 pinctrl-single,pins = <
0350 /* Slave 1 reset value */
0351 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
0352 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
0353 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
0354 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
0355 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
0356 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
0357 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
0358 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
0359 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
0360 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
0361 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
0362 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
0363
0364 /* Slave 2 reset value*/
0365 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLDOWN, MUX_MODE7)
0366 AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE7)
0367 AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_INPUT_PULLDOWN, MUX_MODE7)
0368 AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_INPUT_PULLDOWN, MUX_MODE7)
0369 AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_INPUT_PULLDOWN, MUX_MODE7)
0370 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_INPUT_PULLDOWN, MUX_MODE7)
0371 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_INPUT_PULLDOWN, MUX_MODE7)
0372 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE7)
0373 AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE7)
0374 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE7)
0375 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE7)
0376 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE7)
0377 >;
0378 };
0379
0380 davinci_mdio_default: davinci_mdio_default {
0381 pinctrl-single,pins = <
0382 /* MDIO */
0383 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
0384 AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
0385 >;
0386 };
0387
0388 davinci_mdio_sleep: davinci_mdio_sleep {
0389 pinctrl-single,pins = <
0390 /* MDIO reset value */
0391 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
0392 AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
0393 >;
0394 };
0395
0396 mmc1_pins: pinmux_mmc1_pins {
0397 pinctrl-single,pins = <
0398 AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* spi0_cs1.gpio0_6 */
0399 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
0400 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
0401 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
0402 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
0403 AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
0404 AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
0405 AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT, MUX_MODE4) /* mcasp0_aclkr.mmc0_sdwp */
0406 >;
0407 };
0408
0409 mcasp1_pins: mcasp1_pins {
0410 pinctrl-single,pins = <
0411 AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
0412 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
0413 AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_OUTPUT_PULLDOWN, MUX_MODE4) /* mii1_col.mcasp1_axr2 */
0414 AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
0415 >;
0416 };
0417
0418 mcasp1_pins_sleep: mcasp1_pins_sleep {
0419 pinctrl-single,pins = <
0420 AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7)
0421 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
0422 AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE7)
0423 AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
0424 >;
0425 };
0426
0427 mmc2_pins: pinmux_mmc2_pins {
0428 pinctrl-single,pins = <
0429 AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_wpn.gpio0_31 */
0430 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */
0431 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
0432 AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
0433 AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
0434 AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
0435 AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
0436 >;
0437 };
0438
0439 wl12xx_gpio: pinmux_wl12xx_gpio {
0440 pinctrl-single,pins = <
0441 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_csn0.gpio1_29 */
0442 >;
0443 };
0444 };
0445
0446 &uart0 {
0447 pinctrl-names = "default";
0448 pinctrl-0 = <&uart0_pins>;
0449
0450 status = "okay";
0451 };
0452
0453 &i2c0 {
0454 pinctrl-names = "default";
0455 pinctrl-0 = <&i2c0_pins>;
0456
0457 status = "okay";
0458 clock-frequency = <400000>;
0459
0460 tps: tps@2d {
0461 reg = <0x2d>;
0462 };
0463
0464 lis331dlh: lis331dlh@18 {
0465 compatible = "st,lis331dlh", "st,lis3lv02d";
0466 reg = <0x18>;
0467 Vdd-supply = <&lis3_reg>;
0468 Vdd_IO-supply = <&lis3_reg>;
0469
0470 st,click-single-x;
0471 st,click-single-y;
0472 st,click-single-z;
0473 st,click-thresh-x = <10>;
0474 st,click-thresh-y = <10>;
0475 st,click-thresh-z = <10>;
0476 st,irq1-click;
0477 st,irq2-click;
0478 st,wakeup-x-lo;
0479 st,wakeup-x-hi;
0480 st,wakeup-y-lo;
0481 st,wakeup-y-hi;
0482 st,wakeup-z-lo;
0483 st,wakeup-z-hi;
0484 st,min-limit-x = <120>;
0485 st,min-limit-y = <120>;
0486 st,min-limit-z = <140>;
0487 st,max-limit-x = <550>;
0488 st,max-limit-y = <550>;
0489 st,max-limit-z = <750>;
0490 };
0491
0492 tlv320aic3106: tlv320aic3106@1b {
0493 #sound-dai-cells = <0>;
0494 compatible = "ti,tlv320aic3106";
0495 reg = <0x1b>;
0496 status = "okay";
0497
0498 /* Regulators */
0499 AVDD-supply = <&v3_3d_reg>;
0500 IOVDD-supply = <&v3_3d_reg>;
0501 DRVDD-supply = <&v3_3d_reg>;
0502 DVDD-supply = <&v1_8d_reg>;
0503 };
0504 };
0505
0506 &usb1 {
0507 dr_mode = "host";
0508 };
0509
0510 &epwmss2 {
0511 status = "okay";
0512
0513 ecap2: pwm@100 {
0514 status = "okay";
0515 pinctrl-names = "default";
0516 pinctrl-0 = <&ecap2_pins>;
0517 };
0518 };
0519
0520 #include "tps65910.dtsi"
0521
0522 &tps {
0523 vcc1-supply = <&vbat>;
0524 vcc2-supply = <&vbat>;
0525 vcc3-supply = <&vbat>;
0526 vcc4-supply = <&vbat>;
0527 vcc5-supply = <&vbat>;
0528 vcc6-supply = <&vbat>;
0529 vcc7-supply = <&vbat>;
0530 vccio-supply = <&vbat>;
0531
0532 regulators {
0533 vrtc_reg: regulator@0 {
0534 regulator-always-on;
0535 };
0536
0537 vio_reg: regulator@1 {
0538 regulator-always-on;
0539 };
0540
0541 vdd1_reg: regulator@2 {
0542 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
0543 regulator-name = "vdd_mpu";
0544 regulator-min-microvolt = <912500>;
0545 regulator-max-microvolt = <1351500>;
0546 regulator-boot-on;
0547 regulator-always-on;
0548 };
0549
0550 vdd2_reg: regulator@3 {
0551 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
0552 regulator-name = "vdd_core";
0553 regulator-min-microvolt = <912500>;
0554 regulator-max-microvolt = <1150000>;
0555 regulator-boot-on;
0556 regulator-always-on;
0557 };
0558
0559 vdd3_reg: regulator@4 {
0560 regulator-always-on;
0561 };
0562
0563 vdig1_reg: regulator@5 {
0564 regulator-always-on;
0565 };
0566
0567 vdig2_reg: regulator@6 {
0568 regulator-always-on;
0569 };
0570
0571 vpll_reg: regulator@7 {
0572 regulator-always-on;
0573 };
0574
0575 vdac_reg: regulator@8 {
0576 regulator-always-on;
0577 };
0578
0579 vaux1_reg: regulator@9 {
0580 regulator-always-on;
0581 };
0582
0583 vaux2_reg: regulator@10 {
0584 regulator-always-on;
0585 };
0586
0587 vaux33_reg: regulator@11 {
0588 regulator-always-on;
0589 };
0590
0591 vmmc_reg: regulator@12 {
0592 regulator-min-microvolt = <1800000>;
0593 regulator-max-microvolt = <3300000>;
0594 regulator-always-on;
0595 };
0596 };
0597 };
0598
0599 &mac_sw {
0600 pinctrl-names = "default", "sleep";
0601 pinctrl-0 = <&cpsw_default>;
0602 pinctrl-1 = <&cpsw_sleep>;
0603 status = "okay";
0604 };
0605
0606 &davinci_mdio_sw {
0607 pinctrl-names = "default", "sleep";
0608 pinctrl-0 = <&davinci_mdio_default>;
0609 pinctrl-1 = <&davinci_mdio_sleep>;
0610
0611 ethphy0: ethernet-phy@0 {
0612 reg = <0>;
0613 };
0614
0615 ethphy1: ethernet-phy@1 {
0616 reg = <1>;
0617 };
0618 };
0619
0620 &cpsw_port1 {
0621 phy-handle = <ðphy0>;
0622 phy-mode = "rgmii-id";
0623 ti,dual-emac-pvid = <1>;
0624 };
0625
0626 &cpsw_port2 {
0627 phy-handle = <ðphy1>;
0628 phy-mode = "rgmii-id";
0629 ti,dual-emac-pvid = <2>;
0630 };
0631
0632 &mmc1 {
0633 status = "okay";
0634 vmmc-supply = <&vmmc_reg>;
0635 bus-width = <4>;
0636 pinctrl-names = "default";
0637 pinctrl-0 = <&mmc1_pins>;
0638 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
0639 };
0640
0641 &sham {
0642 status = "okay";
0643 };
0644
0645 &aes {
0646 status = "okay";
0647 };
0648
0649 &gpio0_target {
0650 ti,no-reset-on-init;
0651 };
0652
0653 &mmc2 {
0654 status = "okay";
0655 vmmc-supply = <&wl12xx_vmmc>;
0656 non-removable;
0657 bus-width = <4>;
0658 cap-power-off-card;
0659 keep-power-in-suspend;
0660 pinctrl-names = "default";
0661 pinctrl-0 = <&mmc2_pins>;
0662
0663 #address-cells = <1>;
0664 #size-cells = <0>;
0665 wlcore: wlcore@2 {
0666 compatible = "ti,wl1271";
0667 reg = <2>;
0668 interrupt-parent = <&gpio0>;
0669 interrupts = <31 IRQ_TYPE_EDGE_RISING>; /* gpio 31 */
0670 ref-clock-frequency = <38400000>;
0671 };
0672 };
0673
0674 &mcasp1 {
0675 #sound-dai-cells = <0>;
0676 pinctrl-names = "default", "sleep";
0677 pinctrl-0 = <&mcasp1_pins>;
0678 pinctrl-1 = <&mcasp1_pins_sleep>;
0679
0680 status = "okay";
0681
0682 op-mode = <0>; /* MCASP_IIS_MODE */
0683 tdm-slots = <2>;
0684 /* 4 serializers */
0685 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
0686 0 0 1 2
0687 >;
0688 tx-num-evt = <32>;
0689 rx-num-evt = <32>;
0690 };
0691
0692 &tscadc {
0693 status = "okay";
0694 tsc {
0695 ti,wires = <4>;
0696 ti,x-plate-resistance = <200>;
0697 ti,coordinate-readouts = <5>;
0698 ti,wire-config = <0x00 0x11 0x22 0x33>;
0699 };
0700 };
0701
0702 &lcdc {
0703 status = "okay";
0704
0705 blue-and-red-wiring = "crossed";
0706
0707 port {
0708 lcdc_0: endpoint@0 {
0709 remote-endpoint = <&panel_0>;
0710 };
0711 };
0712 };
0713
0714 &rtc {
0715 clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
0716 clock-names = "ext-clk", "int-clk";
0717 };
0718
0719 &pruss_tm {
0720 status = "okay";
0721 };
0722
0723 &wkup_m3_ipc {
0724 firmware-name = "am335x-evm-scale-data.bin";
0725 };
