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OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
0004  */
0005 
0006 / {
0007         cpus {
0008                 cpu@0 {
0009                         cpu0-supply = <&dcdc2_reg>;
0010                 };
0011         };
0012 
0013         memory@80000000 {
0014                 device_type = "memory";
0015                 reg = <0x80000000 0x10000000>; /* 256 MB */
0016         };
0017 
0018         chosen {
0019                 stdout-path = &uart0;
0020         };
0021 
0022         leds {
0023                 pinctrl-names = "default";
0024                 pinctrl-0 = <&user_leds_s0>;
0025 
0026                 compatible = "gpio-leds";
0027 
0028                 led2 {
0029                         label = "beaglebone:green:heartbeat";
0030                         gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
0031                         linux,default-trigger = "heartbeat";
0032                         default-state = "off";
0033                 };
0034 
0035                 led3 {
0036                         label = "beaglebone:green:mmc0";
0037                         gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
0038                         linux,default-trigger = "mmc0";
0039                         default-state = "off";
0040                 };
0041 
0042                 led4 {
0043                         label = "beaglebone:green:usr2";
0044                         gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
0045                         linux,default-trigger = "cpu0";
0046                         default-state = "off";
0047                 };
0048 
0049                 led5 {
0050                         label = "beaglebone:green:usr3";
0051                         gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
0052                         linux,default-trigger = "mmc1";
0053                         default-state = "off";
0054                 };
0055         };
0056 
0057         vmmcsd_fixed: fixedregulator0 {
0058                 compatible = "regulator-fixed";
0059                 regulator-name = "vmmcsd_fixed";
0060                 regulator-min-microvolt = <3300000>;
0061                 regulator-max-microvolt = <3300000>;
0062         };
0063 };
0064 
0065 &am33xx_pinmux {
0066         pinctrl-names = "default";
0067         pinctrl-0 = <&clkout2_pin>;
0068 
0069         user_leds_s0: user_leds_s0 {
0070                 pinctrl-single,pins = <
0071                         AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7)      /* gpmc_a5.gpio1_21 */
0072                         AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLUP, MUX_MODE7)        /* gpmc_a6.gpio1_22 */
0073                         AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7)      /* gpmc_a7.gpio1_23 */
0074                         AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT_PULLUP, MUX_MODE7)        /* gpmc_a8.gpio1_24 */
0075                 >;
0076         };
0077 
0078         i2c0_pins: pinmux_i2c0_pins {
0079                 pinctrl-single,pins = <
0080                         AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)        /* i2c0_sda.i2c0_sda */
0081                         AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)        /* i2c0_scl.i2c0_scl */
0082                 >;
0083         };
0084 
0085         i2c2_pins: pinmux_i2c2_pins {
0086                 pinctrl-single,pins = <
0087                         AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3)      /* uart1_ctsn.i2c2_sda */
0088                         AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3)      /* uart1_rtsn.i2c2_scl */
0089                 >;
0090         };
0091 
0092         uart0_pins: pinmux_uart0_pins {
0093                 pinctrl-single,pins = <
0094                         AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
0095                         AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0096                 >;
0097         };
0098 
0099         clkout2_pin: pinmux_clkout2_pin {
0100                 pinctrl-single,pins = <
0101                         AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3)     /* xdma_event_intr1.clkout2 */
0102                 >;
0103         };
0104 
0105         cpsw_default: cpsw_default {
0106                 pinctrl-single,pins = <
0107                         /* Slave 1 */
0108                         AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE0)
0109                         AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0110                         AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE0)
0111                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0112                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0113                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0114                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0115                         AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
0116                         AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
0117                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE0)
0118                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLUP, MUX_MODE0)
0119                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE0)
0120                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE0)
0121                 >;
0122         };
0123 
0124         cpsw_sleep: cpsw_sleep {
0125                 pinctrl-single,pins = <
0126                         /* Slave 1 reset value */
0127                         AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
0128                         AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
0129                         AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
0130                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
0131                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
0132                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
0133                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
0134                         AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
0135                         AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
0136                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
0137                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
0138                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
0139                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
0140                 >;
0141         };
0142 
0143         davinci_mdio_default: davinci_mdio_default {
0144                 pinctrl-single,pins = <
0145                         /* MDIO */
0146                         AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
0147                         AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
0148                 >;
0149         };
0150 
0151         davinci_mdio_sleep: davinci_mdio_sleep {
0152                 pinctrl-single,pins = <
0153                         /* MDIO reset value */
0154                         AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
0155                         AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
0156                 >;
0157         };
0158 
0159         mmc1_pins: pinmux_mmc1_pins {
0160                 pinctrl-single,pins = <
0161                         AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7)               /* spio0_cs1.gpio0_6 */
0162                         AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
0163                         AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
0164                         AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
0165                         AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
0166                         AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
0167                         AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
0168                 >;
0169         };
0170 
0171         emmc_pins: pinmux_emmc_pins {
0172                 pinctrl-single,pins = <
0173                         AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */
0174                         AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
0175                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
0176                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
0177                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
0178                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
0179                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
0180                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
0181                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
0182                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
0183                 >;
0184         };
0185 };
0186 
0187 &uart0 {
0188         pinctrl-names = "default";
0189         pinctrl-0 = <&uart0_pins>;
0190 
0191         status = "okay";
0192 };
0193 
0194 &usb0 {
0195         dr_mode = "peripheral";
0196         interrupts-extended = <&intc 18 &tps 0>;
0197         interrupt-names = "mc", "vbus";
0198 };
0199 
0200 &usb1 {
0201         dr_mode = "host";
0202 };
0203 
0204 &i2c0 {
0205         pinctrl-names = "default";
0206         pinctrl-0 = <&i2c0_pins>;
0207 
0208         status = "okay";
0209         clock-frequency = <400000>;
0210 
0211         tps: tps@24 {
0212                 reg = <0x24>;
0213         };
0214 
0215         baseboard_eeprom: baseboard_eeprom@50 {
0216                 compatible = "atmel,24c256";
0217                 reg = <0x50>;
0218 
0219                 #address-cells = <1>;
0220                 #size-cells = <1>;
0221                 baseboard_data: baseboard_data@0 {
0222                         reg = <0 0x100>;
0223                 };
0224         };
0225 };
0226 
0227 &i2c2 {
0228         pinctrl-names = "default";
0229         pinctrl-0 = <&i2c2_pins>;
0230 
0231         status = "okay";
0232         clock-frequency = <100000>;
0233 
0234         cape_eeprom0: cape_eeprom0@54 {
0235                 compatible = "atmel,24c256";
0236                 reg = <0x54>;
0237                 #address-cells = <1>;
0238                 #size-cells = <1>;
0239                 cape0_data: cape_data@0 {
0240                         reg = <0 0x100>;
0241                 };
0242         };
0243 
0244         cape_eeprom1: cape_eeprom1@55 {
0245                 compatible = "atmel,24c256";
0246                 reg = <0x55>;
0247                 #address-cells = <1>;
0248                 #size-cells = <1>;
0249                 cape1_data: cape_data@0 {
0250                         reg = <0 0x100>;
0251                 };
0252         };
0253 
0254         cape_eeprom2: cape_eeprom2@56 {
0255                 compatible = "atmel,24c256";
0256                 reg = <0x56>;
0257                 #address-cells = <1>;
0258                 #size-cells = <1>;
0259                 cape2_data: cape_data@0 {
0260                         reg = <0 0x100>;
0261                 };
0262         };
0263 
0264         cape_eeprom3: cape_eeprom3@57 {
0265                 compatible = "atmel,24c256";
0266                 reg = <0x57>;
0267                 #address-cells = <1>;
0268                 #size-cells = <1>;
0269                 cape3_data: cape_data@0 {
0270                         reg = <0 0x100>;
0271                 };
0272         };
0273 };
0274 
0275 
0276 /include/ "tps65217.dtsi"
0277 
0278 &tps {
0279         /*
0280          * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
0281          * mode") at poweroff.  Most BeagleBone versions do not support RTC-only
0282          * mode and risk hardware damage if this mode is entered.
0283          *
0284          * For details, see linux-omap mailing list May 2015 thread
0285          *      [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
0286          * In particular, messages:
0287          *      http://www.spinics.net/lists/linux-omap/msg118585.html
0288          *      http://www.spinics.net/lists/linux-omap/msg118615.html
0289          *
0290          * You can override this later with
0291          *      &tps {  /delete-property/ ti,pmic-shutdown-controller;  }
0292          * if you want to use RTC-only mode and made sure you are not affected
0293          * by the hardware problems. (Tip: double-check by performing a current
0294          * measurement after shutdown: it should be less than 1 mA.)
0295          */
0296 
0297         interrupts = <7>; /* NMI */
0298         interrupt-parent = <&intc>;
0299 
0300         ti,pmic-shutdown-controller;
0301 
0302         charger {
0303                 status = "okay";
0304         };
0305 
0306         pwrbutton {
0307                 status = "okay";
0308         };
0309 
0310         regulators {
0311                 dcdc1_reg: regulator@0 {
0312                         regulator-name = "vdds_dpr";
0313                         regulator-always-on;
0314                 };
0315 
0316                 dcdc2_reg: regulator@1 {
0317                         /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
0318                         regulator-name = "vdd_mpu";
0319                         regulator-min-microvolt = <925000>;
0320                         regulator-max-microvolt = <1351500>;
0321                         regulator-boot-on;
0322                         regulator-always-on;
0323                 };
0324 
0325                 dcdc3_reg: regulator@2 {
0326                         /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
0327                         regulator-name = "vdd_core";
0328                         regulator-min-microvolt = <925000>;
0329                         regulator-max-microvolt = <1150000>;
0330                         regulator-boot-on;
0331                         regulator-always-on;
0332                 };
0333 
0334                 ldo1_reg: regulator@3 {
0335                         regulator-name = "vio,vrtc,vdds";
0336                         regulator-always-on;
0337                 };
0338 
0339                 ldo2_reg: regulator@4 {
0340                         regulator-name = "vdd_3v3aux";
0341                         regulator-always-on;
0342                 };
0343 
0344                 ldo3_reg: regulator@5 {
0345                         regulator-name = "vdd_1v8";
0346                         regulator-always-on;
0347                 };
0348 
0349                 ldo4_reg: regulator@6 {
0350                         regulator-name = "vdd_3v3a";
0351                         regulator-always-on;
0352                 };
0353         };
0354 };
0355 
0356 &cpsw_port1 {
0357         phy-handle = <&ethphy0>;
0358         phy-mode = "mii";
0359         ti,dual-emac-pvid = <1>;
0360 };
0361 
0362 &cpsw_port2 {
0363         status = "disabled";
0364 };
0365 
0366 &mac_sw {
0367         pinctrl-names = "default", "sleep";
0368         pinctrl-0 = <&cpsw_default>;
0369         pinctrl-1 = <&cpsw_sleep>;
0370         status = "okay";
0371 };
0372 
0373 &davinci_mdio_sw {
0374         pinctrl-names = "default", "sleep";
0375         pinctrl-0 = <&davinci_mdio_default>;
0376         pinctrl-1 = <&davinci_mdio_sleep>;
0377 
0378         ethphy0: ethernet-phy@0 {
0379                 reg = <0>;
0380         };
0381 };
0382 
0383 &mmc1 {
0384         status = "okay";
0385         bus-width = <0x4>;
0386         pinctrl-names = "default";
0387         pinctrl-0 = <&mmc1_pins>;
0388         cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
0389 };
0390 
0391 &aes {
0392         status = "okay";
0393 };
0394 
0395 &sham {
0396         status = "okay";
0397 };
0398 
0399 &rtc {
0400         clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
0401         clock-names = "ext-clk", "int-clk";
0402         system-power-controller;
0403 };
0404 
0405 &pruss_tm {
0406         status = "okay";
0407 };
0408 
0409 &wkup_m3_ipc {
0410         firmware-name = "am335x-bone-scale-data.bin";
0411 };