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OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
0004  */
0005 
0006 /*
0007  * VScom OnRISC
0008  * http://www.vscom.de
0009  */
0010 
0011 /dts-v1/;
0012 
0013 #include "am335x-baltos.dtsi"
0014 #include "am335x-baltos-leds.dtsi"
0015 
0016 / {
0017         model = "OnRISC Baltos iR 5221";
0018 };
0019 
0020 &am33xx_pinmux {
0021         tca6416_pins: pinmux_tca6416_pins {
0022                 pinctrl-single,pins = <
0023                         AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_INPUT_PULLUP, MUX_MODE7)      /* xdma_event_intr1.gpio0[20] tca6416 stuff */
0024                 >;
0025         };
0026 
0027 
0028         dcan1_pins: pinmux_dcan1_pins {
0029                 pinctrl-single,pins = <
0030                         AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT, MUX_MODE2)      /* uart0_ctsn.dcan1_tx_mux0 */
0031                         AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT, MUX_MODE2)      /* uart0_rtsn.dcan1_rx_mux0 */
0032                 >;
0033         };
0034 
0035         uart1_pins: pinmux_uart1_pins {
0036                 pinctrl-single,pins = <
0037                         AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE0)
0038                         AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE0)
0039                         AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0)
0040                         AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0041                         AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7)      /* lcd_vsync.gpio2[22] DTR */
0042                         AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)      /* lcd_hsync.gpio2[23] DSR */
0043                         AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7)      /* lcd_pclk.gpio2[24] DCD */
0044                         AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)      /* lcd_ac_bias_en.gpio2[25] RI */
0045                 >;
0046         };
0047 
0048         uart2_pins: pinmux_uart2_pins {
0049                 pinctrl-single,pins = <
0050                         AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE1)      /* spi0_sclk.uart2_rxd_mux3 */
0051                         AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE1)      /* spi0_d0.uart2_txd_mux3 */
0052                         AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLDOWN, MUX_MODE2)      /* i2c0_sda.uart2_ctsn_mux0 */
0053                         AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_OUTPUT_PULLDOWN, MUX_MODE2)      /* i2c0_scl.uart2_rtsn_mux0 */
0054                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT_PULLDOWN, MUX_MODE7)      /* gpmc_ad12.gpio1[12] DTR */
0055                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7)      /* gpmc_ad13.gpio1[13] DSR */
0056                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7)      /* gpmc_ad14.gpio1[14] DCD */
0057                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7)     /* gpmc_ad15.gpio1[15] RI */
0058 
0059                         AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLUP, MUX_MODE7)      /* mcasp0_aclkr.gpio3[18], INPUT_PULLDOWN | MODE7 */
0060                 >;
0061         };
0062 
0063         mmc1_pins: pinmux_mmc1_pins {
0064                 pinctrl-single,pins = <
0065                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT, MUX_MODE7)     /* MMC1 CD */
0066                 >;
0067         };
0068 };
0069 
0070 &uart1 {
0071         pinctrl-names = "default";
0072         pinctrl-0 = <&uart1_pins>;
0073         dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
0074         dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
0075         dcd-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
0076         rng-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
0077 
0078         status = "okay";
0079 };
0080 
0081 &uart2 {
0082         pinctrl-names = "default";
0083         pinctrl-0 = <&uart2_pins>;
0084         dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
0085         dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
0086         dcd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
0087         rng-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
0088 
0089         status = "okay";
0090 };
0091 
0092 &i2c1 {
0093         tca6416: gpio@20 {
0094                 compatible = "ti,tca6416";
0095                 reg = <0x20>;
0096                 gpio-controller;
0097                 #gpio-cells = <2>;
0098                 interrupt-parent = <&gpio0>;
0099                 interrupts = <20 IRQ_TYPE_EDGE_RISING>;
0100                 pinctrl-names = "default";
0101                 pinctrl-0 = <&tca6416_pins>;
0102         };
0103 };
0104 
0105 &usb0_phy {
0106         status = "okay";
0107 };
0108 
0109 &usb1_phy {
0110         status = "okay";
0111 };
0112 
0113 &usb0 {
0114         status = "okay";
0115         dr_mode = "host";
0116 };
0117 
0118 &usb1 {
0119         status = "okay";
0120         dr_mode = "host";
0121 };
0122 
0123 &cpsw_port1 {
0124         phy-mode = "rmii";
0125         ti,dual-emac-pvid = <1>;
0126         fixed-link {
0127                 speed = <100>;
0128                 full-duplex;
0129         };
0130 };
0131 
0132 &cpsw_port2 {
0133         phy-mode = "rgmii-id";
0134         ti,dual-emac-pvid = <2>;
0135         phy-handle = <&phy1>;
0136 };
0137 
0138 &dcan1 {
0139         pinctrl-names = "default";
0140         pinctrl-0 = <&dcan1_pins>;
0141 
0142         status = "okay";
0143 };
0144 
0145 &mmc1 {
0146         pinctrl-names = "default";
0147         pinctrl-0 = <&mmc1_pins>;
0148         cd-gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
0149 };