0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
0004 */
0005
0006 /*
0007 * VScom OnRISC
0008 * http://www.vscom.de
0009 */
0010
0011 /dts-v1/;
0012
0013 #include "am335x-baltos.dtsi"
0014 #include "am335x-baltos-leds.dtsi"
0015
0016 / {
0017 model = "OnRISC Baltos iR 3220";
0018 };
0019
0020 &am33xx_pinmux {
0021 tca6416_pins: pinmux_tca6416_pins {
0022 pinctrl-single,pins = <
0023 AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_INPUT_PULLUP, MUX_MODE7) /* xdma_event_intr1.gpio0[20] tca6416 stuff */
0024 >;
0025 };
0026
0027 uart1_pins: pinmux_uart1_pins {
0028 pinctrl-single,pins = <
0029 AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE0)
0030 AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE0)
0031 AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0)
0032 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0033 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* lcd_vsync.gpio2[22] DTR */
0034 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_hsync.gpio2[23] DSR */
0035 AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_pclk.gpio2[24] DCD */
0036 AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_ac_bias_en.gpio2[25] RI */
0037 >;
0038 };
0039
0040 uart2_pins: pinmux_uart2_pins {
0041 pinctrl-single,pins = <
0042 AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE1) /* spi0_sclk.uart2_rxd_mux3 */
0043 AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE1) /* spi0_d0.uart2_txd_mux3 */
0044 AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLDOWN, MUX_MODE2) /* i2c0_sda.uart2_ctsn_mux0 */
0045 AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* i2c0_scl.uart2_rtsn_mux0 */
0046 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad12.gpio1[12] DTR */
0047 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad13.gpio1[13] DSR */
0048 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad14.gpio1[14] DCD */
0049 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad15.gpio1[15] RI */
0050
0051 AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLUP, MUX_MODE7) /* mcasp0_aclkr.gpio3[18], INPUT_PULLDOWN | MODE7 */
0052 >;
0053 };
0054
0055 mmc1_pins: pinmux_mmc1_pins {
0056 pinctrl-single,pins = <
0057 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT, MUX_MODE7) /* MMC1 CD */
0058 >;
0059 };
0060 };
0061
0062 &uart1 {
0063 pinctrl-names = "default";
0064 pinctrl-0 = <&uart1_pins>;
0065 dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
0066 dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
0067 dcd-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
0068 rng-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
0069
0070 status = "okay";
0071 };
0072
0073 &uart2 {
0074 pinctrl-names = "default";
0075 pinctrl-0 = <&uart2_pins>;
0076 dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
0077 dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
0078 dcd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
0079 rng-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
0080
0081 status = "okay";
0082 };
0083
0084 &i2c1 {
0085 tca6416: gpio@20 {
0086 compatible = "ti,tca6416";
0087 reg = <0x20>;
0088 gpio-controller;
0089 #gpio-cells = <2>;
0090 interrupt-parent = <&gpio0>;
0091 interrupts = <20 IRQ_TYPE_EDGE_RISING>;
0092 pinctrl-names = "default";
0093 pinctrl-0 = <&tca6416_pins>;
0094 };
0095 };
0096
0097 &usb0_phy {
0098 status = "okay";
0099 };
0100
0101 &usb0 {
0102 status = "okay";
0103 dr_mode = "host";
0104 };
0105
0106 &cpsw_port1 {
0107 phy-mode = "rmii";
0108 ti,dual-emac-pvid = <1>;
0109 fixed-link {
0110 speed = <100>;
0111 full-duplex;
0112 };
0113 };
0114
0115 &cpsw_port2 {
0116 phy-mode = "rgmii-id";
0117 ti,dual-emac-pvid = <2>;
0118 phy-handle = <&phy1>;
0119 };
0120
0121 &mmc1 {
0122 pinctrl-names = "default";
0123 pinctrl-0 = <&mmc1_pins>;
0124 cd-gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
0125 };
