arc/lib/strcpy-700.S

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
0004  */
0005
0006 /* If dst and src are 4 byte aligned, copy 8 bytes at a time.
0007    If the src is 4, but not 8 byte aligned, we first read 4 bytes to get
0008    it 8 byte aligned.  Thus, we can do a little read-ahead, without
0009    dereferencing a cache line that we should not touch.
0010    Note that short and long instructions have been scheduled to avoid
0011    branch stalls.
0012    The beq_s to r3z could be made unaligned & long to avoid a stall
0013    there, but the it is not likely to be taken often, and it
0014    would also be likey to cost an unaligned mispredict at the next call.  */
0015
0016 #include <linux/linkage.h>
0017
0018 ENTRY_CFI(strcpy)
0019     or  r2,r0,r1
0020     bmsk_s  r2,r2,1
0021     brne.d  r2,0,charloop
0022     mov_s   r10,r0
0023     ld_s    r3,[r1,0]
0024     mov r8,0x01010101
0025     bbit0.d r1,2,loop_start
0026     ror r12,r8
0027     sub r2,r3,r8
0028     bic_s   r2,r2,r3
0029     tst_s   r2,r12
0030     bne r3z
0031     mov_s   r4,r3
0032     .balign 4
0033 loop:
0034     ld.a    r3,[r1,4]
0035     st.ab   r4,[r10,4]
0036 loop_start:
0037     ld.a    r4,[r1,4]
0038     sub r2,r3,r8
0039     bic_s   r2,r2,r3
0040     tst_s   r2,r12
0041     bne_s   r3z
0042     st.ab   r3,[r10,4]
0043     sub r2,r4,r8
0044     bic r2,r2,r4
0045     tst r2,r12
0046     beq loop
0047     mov_s   r3,r4
0048 #ifdef __LITTLE_ENDIAN__
0049 r3z:    bmsk.f  r1,r3,7
0050     lsr_s   r3,r3,8
0051 #else
0052 r3z:    lsr.f   r1,r3,24
0053     asl_s   r3,r3,8
0054 #endif
0055     bne.d   r3z
0056     stb.ab  r1,[r10,1]
0057     j_s [blink]
0058
0059     .balign 4
0060 charloop:
0061     ldb.ab  r3,[r1,1]
0062
0063
0064     brne.d  r3,0,charloop
0065     stb.ab  r3,[r10,1]
0066     j   [blink]
0067 END_CFI(strcpy)