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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
0004  */
0005 
0006 #include <linux/linkage.h>
0007 
0008 #define SMALL   7 /* Must be at least 6 to deal with alignment/loop issues.  */
0009 
0010 ENTRY_CFI(memset)
0011     mov_s   r4,r0
0012     or  r12,r0,r2
0013     bmsk.f  r12,r12,1
0014     extb_s  r1,r1
0015     asl r3,r1,8
0016     beq.d   .Laligned
0017     or_s    r1,r1,r3
0018     brls    r2,SMALL,.Ltiny
0019     add r3,r2,r0
0020     stb r1,[r3,-1]
0021     bclr_s  r3,r3,0
0022     stw r1,[r3,-2]
0023     bmsk.f  r12,r0,1
0024     add_s   r2,r2,r12
0025     sub.ne  r2,r2,4
0026     stb.ab  r1,[r4,1]
0027     and r4,r4,-2
0028     stw.ab  r1,[r4,2]
0029     and r4,r4,-4
0030 .Laligned:  ; This code address should be aligned for speed.
0031     asl r3,r1,16
0032     lsr.f   lp_count,r2,2
0033     or_s    r1,r1,r3
0034     lpne    .Loop_end
0035     st.ab   r1,[r4,4]
0036 .Loop_end:
0037     j_s [blink]
0038 
0039     .balign 4
0040 .Ltiny:
0041     mov.f   lp_count,r2
0042     lpne    .Ltiny_end
0043     stb.ab  r1,[r4,1]
0044 .Ltiny_end:
0045     j_s [blink]
0046 END_CFI(memset)
0047 
0048 ; memzero: @r0 = mem, @r1 = size_t
0049 ; memset:  @r0 = mem, @r1 = char, @r2 = size_t
0050 
0051 ENTRY_CFI(memzero)
0052     ; adjust bzero args to memset args
0053     mov r2, r1
0054     mov r1, 0
0055     b  memset    ;tail call so need to tinker with blink
0056 END_CFI(memzero)