include/asm/irqflags-arcv2.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
0004  */
0005
0006 #ifndef __ASM_IRQFLAGS_ARCV2_H
0007 #define __ASM_IRQFLAGS_ARCV2_H
0008
0009 #include <asm/arcregs.h>
0010
0011 /* status32 Bits */
0012 #define STATUS_AD_BIT   19   /* Disable Align chk: core supports non-aligned */
0013 #define STATUS_IE_BIT   31
0014
0015 #define STATUS_AD_MASK      (1<<STATUS_AD_BIT)
0016 #define STATUS_IE_MASK      (1<<STATUS_IE_BIT)
0017
0018 /* status32 Bits as encoded/expected by CLRI/SETI */
0019 #define CLRI_STATUS_IE_BIT  4
0020
0021 #define CLRI_STATUS_E_MASK  0xF
0022 #define CLRI_STATUS_IE_MASK (1 << CLRI_STATUS_IE_BIT)
0023
0024 #define AUX_USER_SP     0x00D
0025 #define AUX_IRQ_CTRL        0x00E
0026 #define AUX_IRQ_ACT     0x043   /* Active Intr across all levels */
0027 #define AUX_IRQ_LVL_PEND    0x200   /* Pending Intr across all levels */
0028 #define AUX_IRQ_HINT        0x201   /* For generating Soft Interrupts */
0029 #define AUX_IRQ_PRIORITY    0x206
0030 #define ICAUSE          0x40a
0031 #define AUX_IRQ_SELECT      0x40b
0032 #define AUX_IRQ_ENABLE      0x40c
0033
0034 /* Was Intr taken in User Mode */
0035 #define AUX_IRQ_ACT_BIT_U   31
0036
0037 /*
0038  * Hardware supports 16 priorities (0 highest, 15 lowest)
0039  * Linux by default runs at 1, priority 0 reserved for NMI style interrupts
0040  */
0041 #define ARCV2_IRQ_DEF_PRIO  1
0042
0043 /* seed value for status register */
0044 #ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
0045 #define __AD_ENB    STATUS_AD_MASK
0046 #else
0047 #define __AD_ENB    0
0048 #endif
0049
0050 #define ISA_INIT_STATUS_BITS    (STATUS_IE_MASK | __AD_ENB | \
0051                     (ARCV2_IRQ_DEF_PRIO << 1))
0052
0053 #ifndef __ASSEMBLY__
0054
0055 /*
0056  * Save IRQ state and disable IRQs
0057  */
0058 static inline long arch_local_irq_save(void)
0059 {
0060     unsigned long flags;
0061
0062     __asm__ __volatile__("  clri %0 \n" : "=r" (flags) : : "memory");
0063
0064     return flags;
0065 }
0066
0067 /*
0068  * restore saved IRQ state
0069  */
0070 static inline void arch_local_irq_restore(unsigned long flags)
0071 {
0072     __asm__ __volatile__("  seti %0 \n" : : "r" (flags) : "memory");
0073 }
0074
0075 /*
0076  * Unconditionally Enable IRQs
0077  */
0078 static inline void arch_local_irq_enable(void)
0079 {
0080     unsigned int irqact = read_aux_reg(AUX_IRQ_ACT);
0081
0082     if (irqact & 0xffff)
0083         write_aux_reg(AUX_IRQ_ACT, irqact & ~0xffff);
0084
0085     __asm__ __volatile__("  seti    \n" : : : "memory");
0086 }
0087
0088 /*
0089  * Unconditionally Disable IRQs
0090  */
0091 static inline void arch_local_irq_disable(void)
0092 {
0093     __asm__ __volatile__("  clri    \n" : : : "memory");
0094 }
0095
0096 /*
0097  * save IRQ state
0098  */
0099 static inline long arch_local_save_flags(void)
0100 {
0101     unsigned long temp;
0102
0103     __asm__ __volatile__(
0104     "   lr  %0, [status32]  \n"
0105     : "=&r"(temp)
0106     :
0107     : "memory");
0108
0109     /* To be compatible with irq_save()/irq_restore()
0110      * encode the irq bits as expected by CLRI/SETI
0111      * (this was needed to make CONFIG_TRACE_IRQFLAGS work)
0112      */
0113     temp = (1 << 5) |
0114         ((!!(temp & STATUS_IE_MASK)) << CLRI_STATUS_IE_BIT) |
0115         ((temp >> 1) & CLRI_STATUS_E_MASK);
0116     return temp;
0117 }
0118
0119 /*
0120  * Query IRQ state
0121  */
0122 static inline int arch_irqs_disabled_flags(unsigned long flags)
0123 {
0124     return !(flags & CLRI_STATUS_IE_MASK);
0125 }
0126
0127 static inline int arch_irqs_disabled(void)
0128 {
0129     return arch_irqs_disabled_flags(arch_local_save_flags());
0130 }
0131
0132 static inline void arc_softirq_trigger(int irq)
0133 {
0134     write_aux_reg(AUX_IRQ_HINT, irq);
0135 }
0136
0137 static inline void arc_softirq_clear(int irq)
0138 {
0139     write_aux_reg(AUX_IRQ_HINT, 0);
0140 }
0141
0142 #else
0143
0144 #ifdef CONFIG_TRACE_IRQFLAGS
0145
0146 .macro TRACE_ASM_IRQ_DISABLE
0147     bl  trace_hardirqs_off
0148 .endm
0149
0150 .macro TRACE_ASM_IRQ_ENABLE
0151     bl  trace_hardirqs_on
0152 .endm
0153
0154 #else
0155
0156 .macro TRACE_ASM_IRQ_DISABLE
0157 .endm
0158
0159 .macro TRACE_ASM_IRQ_ENABLE
0160 .endm
0161
0162 #endif
0163 .macro IRQ_DISABLE  scratch
0164     clri
0165     TRACE_ASM_IRQ_DISABLE
0166 .endm
0167
0168 .macro IRQ_ENABLE  scratch
0169     TRACE_ASM_IRQ_ENABLE
0170     seti
0171 .endm
0172
0173 #endif  /* __ASSEMBLY__ */
0174
0175 #endif