0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
0004 */
0005 /dts-v1/;
0006
0007 /include/ "skeleton.dtsi"
0008
0009 / {
0010 model = "snps,nsim";
0011 compatible = "snps,nsim";
0012 #address-cells = <1>;
0013 #size-cells = <1>;
0014 interrupt-parent = <&core_intc>;
0015
0016 chosen {
0017 bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 print-fatal-signals=1";
0018 };
0019
0020 aliases {
0021 serial0 = &uart0;
0022 };
0023
0024 fpga {
0025 compatible = "simple-bus";
0026 #address-cells = <1>;
0027 #size-cells = <1>;
0028
0029 /* child and parent address space 1:1 mapped */
0030 ranges;
0031
0032 core_clk: core_clk {
0033 #clock-cells = <0>;
0034 compatible = "fixed-clock";
0035 clock-frequency = <80000000>;
0036 };
0037
0038 core_intc: interrupt-controller {
0039 compatible = "snps,arc700-intc";
0040 interrupt-controller;
0041 #interrupt-cells = <1>;
0042 };
0043
0044 uart0: serial@f0000000 {
0045 compatible = "ns16550a";
0046 reg = <0xf0000000 0x2000>;
0047 interrupts = <24>;
0048 clock-frequency = <50000000>;
0049 baud = <115200>;
0050 reg-shift = <2>;
0051 reg-io-width = <4>;
0052 no-loopback-test = <1>;
0053 };
0054
0055 arcpct0: pct {
0056 compatible = "snps,arc700-pct";
0057 };
0058 };
0059 };
