0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Copyright (C) 2016-2014 Synopsys, Inc. (www.synopsys.com)
0004 */
0005 /dts-v1/;
0006
0007 /include/ "skeleton_hs.dtsi"
0008
0009 / {
0010 model = "snps,zebu_hs";
0011 compatible = "snps,zebu_hs";
0012 #address-cells = <2>;
0013 #size-cells = <2>;
0014 interrupt-parent = <&core_intc>;
0015
0016 memory {
0017 device_type = "memory";
0018 /* CONFIG_LINUX_RAM_BASE needs to match low mem start */
0019 reg = <0x0 0x80000000 0x0 0x40000000 /* 1 GB low mem */
0020 0x1 0x00000000 0x0 0x40000000>; /* 1 GB highmem */
0021 };
0022
0023 chosen {
0024 bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1";
0025 };
0026
0027 aliases {
0028 serial0 = &uart0;
0029 };
0030
0031 fpga {
0032 compatible = "simple-bus";
0033 #address-cells = <1>;
0034 #size-cells = <1>;
0035
0036 /* only perip space at end of low mem accessible
0037 bus addr, parent bus addr, size */
0038 ranges = <0x80000000 0x0 0x80000000 0x80000000>;
0039
0040 core_clk: core_clk {
0041 #clock-cells = <0>;
0042 compatible = "fixed-clock";
0043 clock-frequency = <50000000>;
0044 };
0045
0046 core_intc: interrupt-controller {
0047 compatible = "snps,archs-intc";
0048 interrupt-controller;
0049 #interrupt-cells = <1>;
0050 };
0051
0052 uart0: serial@f0000000 {
0053 compatible = "ns16550a";
0054 reg = <0xf0000000 0x2000>;
0055 interrupts = <24>;
0056 clock-frequency = <50000000>;
0057 baud = <115200>;
0058 reg-shift = <2>;
0059 reg-io-width = <4>;
0060 no-loopback-test = <1>;
0061 };
0062
0063 arcpct0: pct {
0064 compatible = "snps,archs-pct";
0065 #interrupt-cells = <1>;
0066 interrupts = <20>;
0067 };
0068
0069 virtio0: virtio@f0100000 {
0070 compatible = "virtio,mmio";
0071 reg = <0xf0100000 0x2000>;
0072 interrupts = <31>;
0073 };
0074
0075 virtio1: virtio@f0102000 {
0076 compatible = "virtio,mmio";
0077 reg = <0xf0102000 0x2000>;
0078 interrupts = <32>;
0079 };
0080
0081 virtio2: virtio@f0104000 {
0082 compatible = "virtio,mmio";
0083 reg = <0xf0104000 0x2000>;
0084 interrupts = <33>;
0085 };
0086
0087 virtio3: virtio@f0106000 {
0088 compatible = "virtio,mmio";
0089 reg = <0xf0106000 0x2000>;
0090 interrupts = <34>;
0091 };
0092
0093 virtio4: virtio@f0108000 {
0094 compatible = "virtio,mmio";
0095 reg = <0xf0108000 0x2000>;
0096 interrupts = <35>;
0097 };
0098 };
0099 };
