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0024 #ifndef _SFP_MACHINE_H
0025 #define _SFP_MACHINE_H
0026
0027 #define _FP_W_TYPE_SIZE 64
0028 #define _FP_W_TYPE unsigned long
0029 #define _FP_WS_TYPE signed long
0030 #define _FP_I_TYPE long
0031
0032 #define _FP_MUL_MEAT_S(R,X,Y) \
0033 _FP_MUL_MEAT_1_imm(_FP_WFRACBITS_S,R,X,Y)
0034 #define _FP_MUL_MEAT_D(R,X,Y) \
0035 _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
0036 #define _FP_MUL_MEAT_Q(R,X,Y) \
0037 _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
0038
0039 #define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_imm(S,R,X,Y,_FP_DIV_HELP_imm)
0040 #define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_1_udiv(D,R,X,Y)
0041 #define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
0042
0043 #define _FP_NANFRAC_S _FP_QNANBIT_S
0044 #define _FP_NANFRAC_D _FP_QNANBIT_D
0045 #define _FP_NANFRAC_Q _FP_QNANBIT_Q
0046 #define _FP_NANSIGN_S 1
0047 #define _FP_NANSIGN_D 1
0048 #define _FP_NANSIGN_Q 1
0049
0050 #define _FP_KEEPNANFRACP 1
0051
0052
0053
0054
0055 #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
0056 do { \
0057 R##_s = Y##_s; \
0058 _FP_FRAC_COPY_##wc(R,X); \
0059 R##_c = FP_CLS_NAN; \
0060 } while (0)
0061
0062
0063 #define FP_ROUNDMODE mode
0064 #define FP_RND_NEAREST (FPCR_DYN_NORMAL >> FPCR_DYN_SHIFT)
0065 #define FP_RND_ZERO (FPCR_DYN_CHOPPED >> FPCR_DYN_SHIFT)
0066 #define FP_RND_PINF (FPCR_DYN_PLUS >> FPCR_DYN_SHIFT)
0067 #define FP_RND_MINF (FPCR_DYN_MINUS >> FPCR_DYN_SHIFT)
0068
0069
0070 #define FP_EX_INVALID IEEE_TRAP_ENABLE_INV
0071 #define FP_EX_OVERFLOW IEEE_TRAP_ENABLE_OVF
0072 #define FP_EX_UNDERFLOW IEEE_TRAP_ENABLE_UNF
0073 #define FP_EX_DIVZERO IEEE_TRAP_ENABLE_DZE
0074 #define FP_EX_INEXACT IEEE_TRAP_ENABLE_INE
0075 #define FP_EX_DENORM IEEE_TRAP_ENABLE_DNO
0076
0077 #define FP_DENORM_ZERO (swcr & IEEE_MAP_DMZ)
0078
0079
0080 #define FP_INHIBIT_RESULTS 0
0081
0082 #endif