0001 =================
0002 x86 IOMMU Support
0003 =================
0004
0005 The architecture specs can be obtained from the below locations.
0006
0007 - Intel: http://www.intel.com/content/dam/www/public/us/en/documents/product-specifications/vt-directed-io-spec.pdf
0008 - AMD: https://www.amd.com/system/files/TechDocs/48882_IOMMU.pdf
0009
0010 This guide gives a quick cheat sheet for some basic understanding.
0011
0012 Basic stuff
0013 -----------
0014
0015 ACPI enumerates and lists the different IOMMUs on the platform, and
0016 device scope relationships between devices and which IOMMU controls
0017 them.
0018
0019 Some ACPI Keywords:
0020
0021 - DMAR - Intel DMA Remapping table
0022 - DRHD - Intel DMA Remapping Hardware Unit Definition
0023 - RMRR - Intel Reserved Memory Region Reporting Structure
0024 - IVRS - AMD I/O Virtualization Reporting Structure
0025 - IVDB - AMD I/O Virtualization Definition Block
0026 - IVHD - AMD I/O Virtualization Hardware Definition
0027
0028 What is Intel RMRR?
0029 ^^^^^^^^^^^^^^^^^^^
0030
0031 There are some devices the BIOS controls, for e.g USB devices to perform
0032 PS2 emulation. The regions of memory used for these devices are marked
0033 reserved in the e820 map. When we turn on DMA translation, DMA to those
0034 regions will fail. Hence BIOS uses RMRR to specify these regions along with
0035 devices that need to access these regions. OS is expected to setup
0036 unity mappings for these regions for these devices to access these regions.
0037
0038 What is AMD IVRS?
0039 ^^^^^^^^^^^^^^^^^
0040
0041 The architecture defines an ACPI-compatible data structure called an I/O
0042 Virtualization Reporting Structure (IVRS) that is used to convey information
0043 related to I/O virtualization to system software. The IVRS describes the
0044 configuration and capabilities of the IOMMUs contained in the platform as
0045 well as information about the devices that each IOMMU virtualizes.
0046
0047 The IVRS provides information about the following:
0048
0049 - IOMMUs present in the platform including their capabilities and proper configuration
0050 - System I/O topology relevant to each IOMMU
0051 - Peripheral devices that cannot be otherwise enumerated
0052 - Memory regions used by SMI/SMM, platform firmware, and platform hardware. These are generally exclusion ranges to be configured by system software.
0053
0054 How is an I/O Virtual Address (IOVA) generated?
0055 -----------------------------------------------
0056
0057 Well behaved drivers call dma_map_*() calls before sending command to device
0058 that needs to perform DMA. Once DMA is completed and mapping is no longer
0059 required, driver performs dma_unmap_*() calls to unmap the region.
0060
0061 Intel Specific Notes
0062 --------------------
0063
0064 Graphics Problems?
0065 ^^^^^^^^^^^^^^^^^^
0066
0067 If you encounter issues with graphics devices, you can try adding
0068 option intel_iommu=igfx_off to turn off the integrated graphics engine.
0069 If this fixes anything, please ensure you file a bug reporting the problem.
0070
0071 Some exceptions to IOVA
0072 ^^^^^^^^^^^^^^^^^^^^^^^
0073
0074 Interrupt ranges are not address translated, (0xfee00000 - 0xfeefffff).
0075 The same is true for peer to peer transactions. Hence we reserve the
0076 address from PCI MMIO ranges so they are not allocated for IOVA addresses.
0077
0078 AMD Specific Notes
0079 ------------------
0080
0081 Graphics Problems?
0082 ^^^^^^^^^^^^^^^^^^
0083
0084 If you encounter issues with integrated graphics devices, you can try adding
0085 option iommu=pt to the kernel command line use a 1:1 mapping for the IOMMU. If
0086 this fixes anything, please ensure you file a bug reporting the problem.
0087
0088 Fault reporting
0089 ---------------
0090 When errors are reported, the IOMMU signals via an interrupt. The fault
0091 reason and device that caused it is printed on the console.
0092
0093
0094 Kernel Log Samples
0095 ------------------
0096
0097 Intel Boot Messages
0098 ^^^^^^^^^^^^^^^^^^^
0099
0100 Something like this gets printed indicating presence of DMAR tables
0101 in ACPI:
0102
0103 ::
0104
0105 ACPI: DMAR (v001 A M I OEMDMAR 0x00000001 MSFT 0x00000097) @ 0x000000007f5b5ef0
0106
0107 When DMAR is being processed and initialized by ACPI, prints DMAR locations
0108 and any RMRR's processed:
0109
0110 ::
0111
0112 ACPI DMAR:Host address width 36
0113 ACPI DMAR:DRHD (flags: 0x00000000)base: 0x00000000fed90000
0114 ACPI DMAR:DRHD (flags: 0x00000000)base: 0x00000000fed91000
0115 ACPI DMAR:DRHD (flags: 0x00000001)base: 0x00000000fed93000
0116 ACPI DMAR:RMRR base: 0x00000000000ed000 end: 0x00000000000effff
0117 ACPI DMAR:RMRR base: 0x000000007f600000 end: 0x000000007fffffff
0118
0119 When DMAR is enabled for use, you will notice:
0120
0121 ::
0122
0123 PCI-DMA: Using DMAR IOMMU
0124
0125 Intel Fault reporting
0126 ^^^^^^^^^^^^^^^^^^^^^
0127
0128 ::
0129
0130 DMAR:[DMA Write] Request device [00:02.0] fault addr 6df084000
0131 DMAR:[fault reason 05] PTE Write access is not set
0132 DMAR:[DMA Write] Request device [00:02.0] fault addr 6df084000
0133 DMAR:[fault reason 05] PTE Write access is not set
0134
0135 AMD Boot Messages
0136 ^^^^^^^^^^^^^^^^^
0137
0138 Something like this gets printed indicating presence of the IOMMU:
0139
0140 ::
0141
0142 iommu: Default domain type: Translated
0143 iommu: DMA domain TLB invalidation policy: lazy mode
0144
0145 AMD Fault reporting
0146 ^^^^^^^^^^^^^^^^^^^
0147
0148 ::
0149
0150 AMD-Vi: Event logged [IO_PAGE_FAULT domain=0x0007 address=0xffffc02000 flags=0x0000]
0151 AMD-Vi: Event logged [IO_PAGE_FAULT device=07:00.0 domain=0x0007 address=0xffffc02000 flags=0x0000]
