0001 .. SPDX-License-Identifier: GPL-2.0
0002
0003 =======================
0004 The 53c700 Driver Notes
0005 =======================
0006
0007 General Description
0008 ===================
0009
0010 This driver supports the 53c700 and 53c700-66 chips. It also supports
0011 the 53c710 but only in 53c700 emulation mode. It is full featured and
0012 does sync (-66 and 710 only), disconnects and tag command queueing.
0013
0014 Since the 53c700 must be interfaced to a bus, you need to wrapper the
0015 card detector around this driver. For an example, see the
0016 NCR_D700.[ch] or lasi700.[ch] files.
0017
0018 The comments in the 53c700.[ch] files tell you which parts you need to
0019 fill in to get the driver working.
0020
0021
0022 Compile Time Flags
0023 ==================
0024
0025 A compile time flag is::
0026
0027 CONFIG_53C700_LE_ON_BE
0028
0029 define if the chipset must be supported in little endian mode on a big
0030 endian architecture (used for the 700 on parisc).
0031
0032
0033 Using the Chip Core Driver
0034 ==========================
0035
0036 In order to plumb the 53c700 chip core driver into a working SCSI
0037 driver, you need to know three things about the way the chip is wired
0038 into your system (or expansion card).
0039
0040 1. The clock speed of the SCSI core
0041 2. The interrupt line used
0042 3. The memory (or io space) location of the 53c700 registers.
0043
0044 Optionally, you may also need to know other things, like how to read
0045 the SCSI Id from the card bios or whether the chip is wired for
0046 differential operation.
0047
0048 Usually you can find items 2. and 3. from general spec. documents or
0049 even by examining the configuration of a working driver under another
0050 operating system.
0051
0052 The clock speed is usually buried deep in the technical literature.
0053 It is required because it is used to set up both the synchronous and
0054 asynchronous dividers for the chip. As a general rule of thumb,
0055 manufacturers set the clock speed at the lowest possible setting
0056 consistent with the best operation of the chip (although some choose
0057 to drive it off the CPU or bus clock rather than going to the expense
0058 of an extra clock chip). The best operation clock speeds are:
0059
0060 ========= =====
0061 53c700 25MHz
0062 53c700-66 50MHz
0063 53c710 40Mhz
0064 ========= =====
0065
0066 Writing Your Glue Driver
0067 ========================
0068
0069 This will be a standard SCSI driver (I don't know of a good document
0070 describing this, just copy from some other driver) with at least a
0071 detect and release entry.
0072
0073 In the detect routine, you need to allocate a struct
0074 NCR_700_Host_Parameters sized memory area and clear it (so that the
0075 default values for everything are 0). Then you must fill in the
0076 parameters that matter to you (see below), plumb the NCR_700_intr
0077 routine into the interrupt line and call NCR_700_detect with the host
0078 template and the new parameters as arguments. You should also call
0079 the relevant request_*_region function and place the register base
0080 address into the 'base' pointer of the host parameters.
0081
0082 In the release routine, you must free the NCR_700_Host_Parameters that
0083 you allocated, call the corresponding release_*_region and free the
0084 interrupt.
0085
0086 Handling Interrupts
0087 -------------------
0088
0089 In general, you should just plumb the card's interrupt line in with
0090
0091 request_irq(irq, NCR_700_intr, <irq flags>, <driver name>, host);
0092
0093 where host is the return from the relevant NCR_700_detect() routine.
0094
0095 You may also write your own interrupt handling routine which calls
0096 NCR_700_intr() directly. However, you should only really do this if
0097 you have a card with more than one chip on it and you can read a
0098 register to tell which set of chips wants the interrupt.
0099
0100 Settable NCR_700_Host_Parameters
0101 --------------------------------
0102
0103 The following are a list of the user settable parameters:
0104
0105 clock: (MANDATORY)
0106 Set to the clock speed of the chip in MHz.
0107
0108 base: (MANDATORY)
0109 Set to the base of the io or mem region for the register set. On 64
0110 bit architectures this is only 32 bits wide, so the registers must be
0111 mapped into the low 32 bits of memory.
0112
0113 pci_dev: (OPTIONAL)
0114 Set to the PCI board device. Leave NULL for a non-pci board. This is
0115 used for the pci_alloc_consistent() and pci_map_*() functions.
0116
0117 dmode_extra: (OPTIONAL, 53c710 only)
0118 Extra flags for the DMODE register. These are used to control bus
0119 output pins on the 710. The settings should be a combination of
0120 DMODE_FC1 and DMODE_FC2. What these pins actually do is entirely up
0121 to the board designer. Usually it is safe to ignore this setting.
0122
0123 differential: (OPTIONAL)
0124 Set to 1 if the chip drives a differential bus.
0125
0126 force_le_on_be: (OPTIONAL, only if CONFIG_53C700_LE_ON_BE is set)
0127 Set to 1 if the chip is operating in little endian mode on a big
0128 endian architecture.
0129
0130 chip710: (OPTIONAL)
0131 Set to 1 if the chip is a 53c710.
0132
0133 burst_disable: (OPTIONAL, 53c710 only)
0134 Disable 8 byte bursting for DMA transfers.
