0001 ================================
0002 Register Usage for Linux/PA-RISC
0003 ================================
0004
0005 [ an asterisk is used for planned usage which is currently unimplemented ]
0006
0007 General Registers as specified by ABI
0008 =====================================
0009
0010 Control Registers
0011 -----------------
0012
0013 =============================== ===============================================
0014 CR 0 (Recovery Counter) used for ptrace
0015 CR 1-CR 7(undefined) unused
0016 CR 8 (Protection ID) per-process value*
0017 CR 9, 12, 13 (PIDS) unused
0018 CR10 (CCR) lazy FPU saving*
0019 CR11 as specified by ABI (SAR)
0020 CR14 (interruption vector) initialized to fault_vector
0021 CR15 (EIEM) initialized to all ones*
0022 CR16 (Interval Timer) read for cycle count/write starts Interval Tmr
0023 CR17-CR22 interruption parameters
0024 CR19 Interrupt Instruction Register
0025 CR20 Interrupt Space Register
0026 CR21 Interrupt Offset Register
0027 CR22 Interrupt PSW
0028 CR23 (EIRR) read for pending interrupts/write clears bits
0029 CR24 (TR 0) Kernel Space Page Directory Pointer
0030 CR25 (TR 1) User Space Page Directory Pointer
0031 CR26 (TR 2) not used
0032 CR27 (TR 3) Thread descriptor pointer
0033 CR28 (TR 4) not used
0034 CR29 (TR 5) not used
0035 CR30 (TR 6) current / 0
0036 CR31 (TR 7) Temporary register, used in various places
0037 =============================== ===============================================
0038
0039 Space Registers (kernel mode)
0040 -----------------------------
0041
0042 =============================== ===============================================
0043 SR0 temporary space register
0044 SR4-SR7 set to 0
0045 SR1 temporary space register
0046 SR2 kernel should not clobber this
0047 SR3 used for userspace accesses (current process)
0048 =============================== ===============================================
0049
0050 Space Registers (user mode)
0051 ---------------------------
0052
0053 =============================== ===============================================
0054 SR0 temporary space register
0055 SR1 temporary space register
0056 SR2 holds space of linux gateway page
0057 SR3 holds user address space value while in kernel
0058 SR4-SR7 Defines short address space for user/kernel
0059 =============================== ===============================================
0060
0061
0062 Processor Status Word
0063 ---------------------
0064
0065 =============================== ===============================================
0066 W (64-bit addresses) 0
0067 E (Little-endian) 0
0068 S (Secure Interval Timer) 0
0069 T (Taken Branch Trap) 0
0070 H (Higher-privilege trap) 0
0071 L (Lower-privilege trap) 0
0072 N (Nullify next instruction) used by C code
0073 X (Data memory break disable) 0
0074 B (Taken Branch) used by C code
0075 C (code address translation) 1, 0 while executing real-mode code
0076 V (divide step correction) used by C code
0077 M (HPMC mask) 0, 1 while executing HPMC handler*
0078 C/B (carry/borrow bits) used by C code
0079 O (ordered references) 1*
0080 F (performance monitor) 0
0081 R (Recovery Counter trap) 0
0082 Q (collect interruption state) 1 (0 in code directly preceding an rfi)
0083 P (Protection Identifiers) 1*
0084 D (Data address translation) 1, 0 while executing real-mode code
0085 I (external interrupt mask) used by cli()/sti() macros
0086 =============================== ===============================================
0087
0088 "Invisible" Registers
0089 ---------------------
0090
0091 =============================== ===============================================
0092 PSW default W value 0
0093 PSW default E value 0
0094 Shadow Registers used by interruption handler code
0095 TOC enable bit 1
0096 =============================== ===============================================
0097
0098 -------------------------------------------------------------------------
0099
0100 The PA-RISC architecture defines 7 registers as "shadow registers".
0101 Those are used in RETURN FROM INTERRUPTION AND RESTORE instruction to reduce
0102 the state save and restore time by eliminating the need for general register
0103 (GR) saves and restores in interruption handlers.
0104 Shadow registers are the GRs 1, 8, 9, 16, 17, 24, and 25.
0105
0106 -------------------------------------------------------------------------
0107
0108 Register usage notes, originally from John Marvin, with some additional
0109 notes from Randolph Chung.
0110
0111 For the general registers:
0112
0113 r1,r2,r19-r26,r28,r29 & r31 can be used without saving them first. And of
0114 course, you need to save them if you care about them, before calling
0115 another procedure. Some of the above registers do have special meanings
0116 that you should be aware of:
0117
0118 r1:
0119 The addil instruction is hardwired to place its result in r1,
0120 so if you use that instruction be aware of that.
0121
0122 r2:
0123 This is the return pointer. In general you don't want to
0124 use this, since you need the pointer to get back to your
0125 caller. However, it is grouped with this set of registers
0126 since the caller can't rely on the value being the same
0127 when you return, i.e. you can copy r2 to another register
0128 and return through that register after trashing r2, and
0129 that should not cause a problem for the calling routine.
0130
0131 r19-r22:
0132 these are generally regarded as temporary registers.
0133 Note that in 64 bit they are arg7-arg4.
0134
0135 r23-r26:
0136 these are arg3-arg0, i.e. you can use them if you
0137 don't care about the values that were passed in anymore.
0138
0139 r28,r29:
0140 are ret0 and ret1. They are what you pass return values
0141 in. r28 is the primary return. When returning small structures
0142 r29 may also be used to pass data back to the caller.
0143
0144 r30:
0145 stack pointer
0146
0147 r31:
0148 the ble instruction puts the return pointer in here.
0149
0150
0151 r3-r18,r27,r30 need to be saved and restored. r3-r18 are just
0152 general purpose registers. r27 is the data pointer, and is
0153 used to make references to global variables easier. r30 is
0154 the stack pointer.