0001 .. SPDX-License-Identifier: GPL-2.0
0002
0003 ===========================================================================
0004 Driver for Synopsys DesignWare PCIe traffic generator (also known as xData)
0005 ===========================================================================
0006
0007 Supported chips:
0008 Synopsys DesignWare PCIe prototype solution
0009
0010 Datasheet:
0011 Not freely available
0012
0013 Author:
0014 Gustavo Pimentel <gustavo.pimentel@synopsys.com>
0015
0016 Description
0017 -----------
0018
0019 This driver should be used as a host-side (Root Complex) driver and Synopsys
0020 DesignWare prototype that includes this IP.
0021
0022 The dw-xdata-pcie driver can be used to enable/disable PCIe traffic
0023 generator in either direction (mutual exclusion) besides allowing the
0024 PCIe link performance analysis.
0025
0026 The interaction with this driver is done through the module parameter and
0027 can be changed in runtime. The driver outputs the requested command state
0028 information to ``/var/log/kern.log`` or dmesg.
0029
0030 Example
0031 -------
0032
0033 Write TLPs traffic generation - Root Complex to Endpoint direction
0034 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
0035
0036 Generate traffic::
0037
0038 # echo 1 > /sys/class/misc/dw-xdata-pcie.0/write
0039
0040 Get link throughput in MB/s::
0041
0042 # cat /sys/class/misc/dw-xdata-pcie.0/write
0043 204
0044
0045 Stop traffic in any direction::
0046
0047 # echo 0 > /sys/class/misc/dw-xdata-pcie.0/write
0048
0049 Read TLPs traffic generation - Endpoint to Root Complex direction
0050 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
0051
0052 Generate traffic::
0053
0054 # echo 1 > /sys/class/misc/dw-xdata-pcie.0/read
0055
0056 Get link throughput in MB/s::
0057
0058 # cat /sys/class/misc/dw-xdata-pcie.0/read
0059 199
0060
0061 Stop traffic in any direction::
0062
0063 # echo 0 > /sys/class/misc/dw-xdata-pcie.0/read
0064
