0001 ==================
0002 The SMBus Protocol
0003 ==================
0004
0005 The following is a summary of the SMBus protocol. It applies to
0006 all revisions of the protocol (1.0, 1.1, and 2.0).
0007 Certain protocol features which are not supported by
0008 this package are briefly described at the end of this document.
0009
0010 Some adapters understand only the SMBus (System Management Bus) protocol,
0011 which is a subset from the I2C protocol. Fortunately, many devices use
0012 only the same subset, which makes it possible to put them on an SMBus.
0013
0014 If you write a driver for some I2C device, please try to use the SMBus
0015 commands if at all possible (if the device uses only that subset of the
0016 I2C protocol). This makes it possible to use the device driver on both
0017 SMBus adapters and I2C adapters (the SMBus command set is automatically
0018 translated to I2C on I2C adapters, but plain I2C commands can not be
0019 handled at all on most pure SMBus adapters).
0020
0021 Below is a list of SMBus protocol operations, and the functions executing
0022 them. Note that the names used in the SMBus protocol specifications usually
0023 don't match these function names. For some of the operations which pass a
0024 single data byte, the functions using SMBus protocol operation names execute
0025 a different protocol operation entirely.
0026
0027 Each transaction type corresponds to a functionality flag. Before calling a
0028 transaction function, a device driver should always check (just once) for
0029 the corresponding functionality flag to ensure that the underlying I2C
0030 adapter supports the transaction in question. See
0031 Documentation/i2c/functionality.rst for the details.
0032
0033
0034 Key to symbols
0035 ==============
0036
0037 =============== =============================================================
0038 S Start condition
0039 Sr Repeated start condition, used to switch from write to
0040 read mode.
0041 P Stop condition
0042 Rd/Wr (1 bit) Read/Write bit. Rd equals 1, Wr equals 0.
0043 A, NA (1 bit) Acknowledge (ACK) and Not Acknowledge (NACK) bit
0044 Addr (7 bits) I2C 7 bit address. Note that this can be expanded to
0045 get a 10 bit I2C address.
0046 Comm (8 bits) Command byte, a data byte which often selects a register on
0047 the device.
0048 Data (8 bits) A plain data byte. DataLow and DataHigh represent the low and
0049 high byte of a 16 bit word.
0050 Count (8 bits) A data byte containing the length of a block operation.
0051
0052 [..] Data sent by I2C device, as opposed to data sent by the host
0053 adapter.
0054 =============== =============================================================
0055
0056
0057 SMBus Quick Command
0058 ===================
0059
0060 This sends a single bit to the device, at the place of the Rd/Wr bit::
0061
0062 S Addr Rd/Wr [A] P
0063
0064 Functionality flag: I2C_FUNC_SMBUS_QUICK
0065
0066
0067 SMBus Receive Byte
0068 ==================
0069
0070 Implemented by i2c_smbus_read_byte()
0071
0072 This reads a single byte from a device, without specifying a device
0073 register. Some devices are so simple that this interface is enough; for
0074 others, it is a shorthand if you want to read the same register as in
0075 the previous SMBus command::
0076
0077 S Addr Rd [A] [Data] NA P
0078
0079 Functionality flag: I2C_FUNC_SMBUS_READ_BYTE
0080
0081
0082 SMBus Send Byte
0083 ===============
0084
0085 Implemented by i2c_smbus_write_byte()
0086
0087 This operation is the reverse of Receive Byte: it sends a single byte
0088 to a device. See Receive Byte for more information.
0089
0090 ::
0091
0092 S Addr Wr [A] Data [A] P
0093
0094 Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE
0095
0096
0097 SMBus Read Byte
0098 ===============
0099
0100 Implemented by i2c_smbus_read_byte_data()
0101
0102 This reads a single byte from a device, from a designated register.
0103 The register is specified through the Comm byte::
0104
0105 S Addr Wr [A] Comm [A] Sr Addr Rd [A] [Data] NA P
0106
0107 Functionality flag: I2C_FUNC_SMBUS_READ_BYTE_DATA
0108
0109
0110 SMBus Read Word
0111 ===============
0112
0113 Implemented by i2c_smbus_read_word_data()
0114
0115 This operation is very like Read Byte; again, data is read from a
0116 device, from a designated register that is specified through the Comm
0117 byte. But this time, the data is a complete word (16 bits)::
0118
0119 S Addr Wr [A] Comm [A] Sr Addr Rd [A] [DataLow] A [DataHigh] NA P
0120
0121 Functionality flag: I2C_FUNC_SMBUS_READ_WORD_DATA
0122
0123 Note the convenience function i2c_smbus_read_word_swapped() is
0124 available for reads where the two data bytes are the other way
0125 around (not SMBus compliant, but very popular.)
0126
0127
0128 SMBus Write Byte
0129 ================
0130
0131 Implemented by i2c_smbus_write_byte_data()
0132
0133 This writes a single byte to a device, to a designated register. The
0134 register is specified through the Comm byte. This is the opposite of
0135 the Read Byte operation.
0136
0137 ::
0138
0139 S Addr Wr [A] Comm [A] Data [A] P
0140
0141 Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE_DATA
0142
0143
0144 SMBus Write Word
0145 ================
0146
0147 Implemented by i2c_smbus_write_word_data()
0148
0149 This is the opposite of the Read Word operation. 16 bits
0150 of data are written to a device, to the designated register that is
0151 specified through the Comm byte::
0152
0153 S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P
0154
0155 Functionality flag: I2C_FUNC_SMBUS_WRITE_WORD_DATA
0156
0157 Note the convenience function i2c_smbus_write_word_swapped() is
0158 available for writes where the two data bytes are the other way
0159 around (not SMBus compliant, but very popular.)
0160
0161
0162 SMBus Process Call
0163 ==================
0164
0165 This command selects a device register (through the Comm byte), sends
0166 16 bits of data to it, and reads 16 bits of data in return::
0167
0168 S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A]
0169 Sr Addr Rd [A] [DataLow] A [DataHigh] NA P
0170
0171 Functionality flag: I2C_FUNC_SMBUS_PROC_CALL
0172
0173
0174 SMBus Block Read
0175 ================
0176
0177 Implemented by i2c_smbus_read_block_data()
0178
0179 This command reads a block of up to 32 bytes from a device, from a
0180 designated register that is specified through the Comm byte. The amount
0181 of data is specified by the device in the Count byte.
0182
0183 ::
0184
0185 S Addr Wr [A] Comm [A]
0186 Sr Addr Rd [A] [Count] A [Data] A [Data] A ... A [Data] NA P
0187
0188 Functionality flag: I2C_FUNC_SMBUS_READ_BLOCK_DATA
0189
0190
0191 SMBus Block Write
0192 =================
0193
0194 Implemented by i2c_smbus_write_block_data()
0195
0196 The opposite of the Block Read command, this writes up to 32 bytes to
0197 a device, to a designated register that is specified through the
0198 Comm byte. The amount of data is specified in the Count byte.
0199
0200 ::
0201
0202 S Addr Wr [A] Comm [A] Count [A] Data [A] Data [A] ... [A] Data [A] P
0203
0204 Functionality flag: I2C_FUNC_SMBUS_WRITE_BLOCK_DATA
0205
0206
0207 SMBus Block Write - Block Read Process Call
0208 ===========================================
0209
0210 SMBus Block Write - Block Read Process Call was introduced in
0211 Revision 2.0 of the specification.
0212
0213 This command selects a device register (through the Comm byte), sends
0214 1 to 31 bytes of data to it, and reads 1 to 31 bytes of data in return::
0215
0216 S Addr Wr [A] Comm [A] Count [A] Data [A] ...
0217 Sr Addr Rd [A] [Count] A [Data] ... A P
0218
0219 Functionality flag: I2C_FUNC_SMBUS_BLOCK_PROC_CALL
0220
0221
0222 SMBus Host Notify
0223 =================
0224
0225 This command is sent from a SMBus device acting as a master to the
0226 SMBus host acting as a slave.
0227 It is the same form as Write Word, with the command code replaced by the
0228 alerting device's address.
0229
0230 ::
0231
0232 [S] [HostAddr] [Wr] A [DevAddr] A [DataLow] A [DataHigh] A [P]
0233
0234 This is implemented in the following way in the Linux kernel:
0235
0236 * I2C bus drivers which support SMBus Host Notify should report
0237 I2C_FUNC_SMBUS_HOST_NOTIFY.
0238 * I2C bus drivers trigger SMBus Host Notify by a call to
0239 i2c_handle_smbus_host_notify().
0240 * I2C drivers for devices which can trigger SMBus Host Notify will have
0241 client->irq assigned to a Host Notify IRQ if noone else specified an other.
0242
0243 There is currently no way to retrieve the data parameter from the client.
0244
0245
0246 Packet Error Checking (PEC)
0247 ===========================
0248
0249 Packet Error Checking was introduced in Revision 1.1 of the specification.
0250
0251 PEC adds a CRC-8 error-checking byte to transfers using it, immediately
0252 before the terminating STOP.
0253
0254
0255 Address Resolution Protocol (ARP)
0256 =================================
0257
0258 The Address Resolution Protocol was introduced in Revision 2.0 of
0259 the specification. It is a higher-layer protocol which uses the
0260 messages above.
0261
0262 ARP adds device enumeration and dynamic address assignment to
0263 the protocol. All ARP communications use slave address 0x61 and
0264 require PEC checksums.
0265
0266
0267 SMBus Alert
0268 ===========
0269
0270 SMBus Alert was introduced in Revision 1.0 of the specification.
0271
0272 The SMBus alert protocol allows several SMBus slave devices to share a
0273 single interrupt pin on the SMBus master, while still allowing the master
0274 to know which slave triggered the interrupt.
0275
0276 This is implemented the following way in the Linux kernel:
0277
0278 * I2C bus drivers which support SMBus alert should call
0279 i2c_new_smbus_alert_device() to install SMBus alert support.
0280 * I2C drivers for devices which can trigger SMBus alerts should implement
0281 the optional alert() callback.
0282
0283
0284 I2C Block Transactions
0285 ======================
0286
0287 The following I2C block transactions are similar to the SMBus Block Read
0288 and Write operations, except these do not have a Count byte. They are
0289 supported by the SMBus layer and are described here for completeness, but
0290 they are *NOT* defined by the SMBus specification.
0291
0292 I2C block transactions do not limit the number of bytes transferred
0293 but the SMBus layer places a limit of 32 bytes.
0294
0295
0296 I2C Block Read
0297 ==============
0298
0299 Implemented by i2c_smbus_read_i2c_block_data()
0300
0301 This command reads a block of bytes from a device, from a
0302 designated register that is specified through the Comm byte::
0303
0304 S Addr Wr [A] Comm [A]
0305 Sr Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
0306
0307 Functionality flag: I2C_FUNC_SMBUS_READ_I2C_BLOCK
0308
0309
0310 I2C Block Write
0311 ===============
0312
0313 Implemented by i2c_smbus_write_i2c_block_data()
0314
0315 The opposite of the Block Read command, this writes bytes to
0316 a device, to a designated register that is specified through the
0317 Comm byte. Note that command lengths of 0, 2, or more bytes are
0318 supported as they are indistinguishable from data.
0319
0320 ::
0321
0322 S Addr Wr [A] Comm [A] Data [A] Data [A] ... [A] Data [A] P
0323
0324 Functionality flag: I2C_FUNC_SMBUS_WRITE_I2C_BLOCK
