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0001 =====================================
0002 Linux I2C slave interface description
0003 =====================================
0004 
0005 by Wolfram Sang <wsa@sang-engineering.com> in 2014-15
0006 
0007 Linux can also be an I2C slave if the I2C controller in use has slave
0008 functionality. For that to work, one needs slave support in the bus driver plus
0009 a hardware independent software backend providing the actual functionality. An
0010 example for the latter is the slave-eeprom driver, which acts as a dual memory
0011 driver. While another I2C master on the bus can access it like a regular
0012 EEPROM, the Linux I2C slave can access the content via sysfs and handle data as
0013 needed. The backend driver and the I2C bus driver communicate via events. Here
0014 is a small graph visualizing the data flow and the means by which data is
0015 transported. The dotted line marks only one example. The backend could also
0016 use a character device, be in-kernel only, or something completely different::
0017 
0018 
0019               e.g. sysfs        I2C slave events        I/O registers
0020   +-----------+   v    +---------+     v     +--------+  v  +------------+
0021   | Userspace +........+ Backend +-----------+ Driver +-----+ Controller |
0022   +-----------+        +---------+           +--------+     +------------+
0023                                                                 | |
0024   ----------------------------------------------------------------+--  I2C
0025   --------------------------------------------------------------+----  Bus
0026 
0027 Note: Technically, there is also the I2C core between the backend and the
0028 driver. However, at this time of writing, the layer is transparent.
0029 
0030 
0031 User manual
0032 ===========
0033 
0034 I2C slave backends behave like standard I2C clients. So, you can instantiate
0035 them as described in the document instantiating-devices.rst. The only
0036 difference is that i2c slave backends have their own address space. So, you
0037 have to add 0x1000 to the address you would originally request. An example for
0038 instantiating the slave-eeprom driver from userspace at the 7 bit address 0x64
0039 on bus 1::
0040 
0041   # echo slave-24c02 0x1064 > /sys/bus/i2c/devices/i2c-1/new_device
0042 
0043 Each backend should come with separate documentation to describe its specific
0044 behaviour and setup.
0045 
0046 
0047 Developer manual
0048 ================
0049 
0050 First, the events which are used by the bus driver and the backend will be
0051 described in detail. After that, some implementation hints for extending bus
0052 drivers and writing backends will be given.
0053 
0054 
0055 I2C slave events
0056 ----------------
0057 
0058 The bus driver sends an event to the backend using the following function::
0059 
0060         ret = i2c_slave_event(client, event, &val)
0061 
0062 'client' describes the I2C slave device. 'event' is one of the special event
0063 types described hereafter. 'val' holds an u8 value for the data byte to be
0064 read/written and is thus bidirectional. The pointer to val must always be
0065 provided even if val is not used for an event, i.e. don't use NULL here. 'ret'
0066 is the return value from the backend. Mandatory events must be provided by the
0067 bus drivers and must be checked for by backend drivers.
0068 
0069 Event types:
0070 
0071 * I2C_SLAVE_WRITE_REQUESTED (mandatory)
0072 
0073   'val': unused
0074 
0075   'ret': always 0
0076 
0077 Another I2C master wants to write data to us. This event should be sent once
0078 our own address and the write bit was detected. The data did not arrive yet, so
0079 there is nothing to process or return. Wakeup or initialization probably needs
0080 to be done, though.
0081 
0082 * I2C_SLAVE_READ_REQUESTED (mandatory)
0083 
0084   'val': backend returns first byte to be sent
0085 
0086   'ret': always 0
0087 
0088 Another I2C master wants to read data from us. This event should be sent once
0089 our own address and the read bit was detected. After returning, the bus driver
0090 should transmit the first byte.
0091 
0092 * I2C_SLAVE_WRITE_RECEIVED (mandatory)
0093 
0094   'val': bus driver delivers received byte
0095 
0096   'ret': 0 if the byte should be acked, some errno if the byte should be nacked
0097 
0098 Another I2C master has sent a byte to us which needs to be set in 'val'. If 'ret'
0099 is zero, the bus driver should ack this byte. If 'ret' is an errno, then the byte
0100 should be nacked.
0101 
0102 * I2C_SLAVE_READ_PROCESSED (mandatory)
0103 
0104   'val': backend returns next byte to be sent
0105 
0106   'ret': always 0
0107 
0108 The bus driver requests the next byte to be sent to another I2C master in
0109 'val'. Important: This does not mean that the previous byte has been acked, it
0110 only means that the previous byte is shifted out to the bus! To ensure seamless
0111 transmission, most hardware requests the next byte when the previous one is
0112 still shifted out. If the master sends NACK and stops reading after the byte
0113 currently shifted out, this byte requested here is never used. It very likely
0114 needs to be sent again on the next I2C_SLAVE_READ_REQUEST, depending a bit on
0115 your backend, though.
0116 
0117 * I2C_SLAVE_STOP (mandatory)
0118 
0119   'val': unused
0120 
0121   'ret': always 0
0122 
0123 A stop condition was received. This can happen anytime and the backend should
0124 reset its state machine for I2C transfers to be able to receive new requests.
0125 
0126 
0127 Software backends
0128 -----------------
0129 
0130 If you want to write a software backend:
0131 
0132 * use a standard i2c_driver and its matching mechanisms
0133 * write the slave_callback which handles the above slave events
0134   (best using a state machine)
0135 * register this callback via i2c_slave_register()
0136 
0137 Check the i2c-slave-eeprom driver as an example.
0138 
0139 
0140 Bus driver support
0141 ------------------
0142 
0143 If you want to add slave support to the bus driver:
0144 
0145 * implement calls to register/unregister the slave and add those to the
0146   struct i2c_algorithm. When registering, you probably need to set the I2C
0147   slave address and enable slave specific interrupts. If you use runtime pm, you
0148   should use pm_runtime_get_sync() because your device usually needs to be
0149   powered on always to be able to detect its slave address. When unregistering,
0150   do the inverse of the above.
0151 
0152 * Catch the slave interrupts and send appropriate i2c_slave_events to the backend.
0153 
0154 Note that most hardware supports being master _and_ slave on the same bus. So,
0155 if you extend a bus driver, please make sure that the driver supports that as
0156 well. In almost all cases, slave support does not need to disable the master
0157 functionality.
0158 
0159 Check the i2c-rcar driver as an example.
0160 
0161 
0162 About ACK/NACK
0163 --------------
0164 
0165 It is good behaviour to always ACK the address phase, so the master knows if a
0166 device is basically present or if it mysteriously disappeared. Using NACK to
0167 state being busy is troublesome. SMBus demands to always ACK the address phase,
0168 while the I2C specification is more loose on that. Most I2C controllers also
0169 automatically ACK when detecting their slave addresses, so there is no option
0170 to NACK them. For those reasons, this API does not support NACK in the address
0171 phase.
0172 
0173 Currently, there is no slave event to report if the master did ACK or NACK a
0174 byte when it reads from us. We could make this an optional event if the need
0175 arises. However, cases should be extremely rare because the master is expected
0176 to send STOP after that and we have an event for that. Also, keep in mind not
0177 all I2C controllers have the possibility to report that event.
0178 
0179 
0180 About buffers
0181 -------------
0182 
0183 During development of this API, the question of using buffers instead of just
0184 bytes came up. Such an extension might be possible, usefulness is unclear at
0185 this time of writing. Some points to keep in mind when using buffers:
0186 
0187 * Buffers should be opt-in and backend drivers will always have to support
0188   byte-based transactions as the ultimate fallback anyhow because this is how
0189   the majority of HW works.
0190 
0191 * For backends simulating hardware registers, buffers are largely not helpful
0192   because after each byte written an action should be immediately triggered.
0193   For reads, the data kept in the buffer might get stale if the backend just
0194   updated a register because of internal processing.
0195 
0196 * A master can send STOP at any time. For partially transferred buffers, this
0197   means additional code to handle this exception. Such code tends to be
0198   error-prone.