0001 ================================
0002 I2C muxes and complex topologies
0003 ================================
0004
0005 There are a couple of reasons for building more complex I2C topologies
0006 than a straight-forward I2C bus with one adapter and one or more devices.
0007
0008 Some example use cases are:
0009
0010 1. A mux may be needed on the bus to prevent address collisions.
0011
0012 2. The bus may be accessible from some external bus master, and arbitration
0013 may be needed to determine if it is ok to access the bus.
0014
0015 3. A device (particularly RF tuners) may want to avoid the digital noise
0016 from the I2C bus, at least most of the time, and sits behind a gate
0017 that has to be operated before the device can be accessed.
0018
0019 Several types of hardware components such as I2C muxes, I2C gates and I2C
0020 arbitrators allow to handle such needs.
0021
0022 These components are represented as I2C adapter trees by Linux, where
0023 each adapter has a parent adapter (except the root adapter) and zero or
0024 more child adapters. The root adapter is the actual adapter that issues
0025 I2C transfers, and all adapters with a parent are part of an "i2c-mux"
0026 object (quoted, since it can also be an arbitrator or a gate).
0027
0028 Depending of the particular mux driver, something happens when there is
0029 an I2C transfer on one of its child adapters. The mux driver can
0030 obviously operate a mux, but it can also do arbitration with an external
0031 bus master or open a gate. The mux driver has two operations for this,
0032 select and deselect. select is called before the transfer and (the
0033 optional) deselect is called after the transfer.
0034
0035
0036 Locking
0037 =======
0038
0039 There are two variants of locking available to I2C muxes, they can be
0040 mux-locked or parent-locked muxes.
0041
0042
0043 Mux-locked muxes
0044 ----------------
0045
0046 Mux-locked muxes does not lock the entire parent adapter during the
0047 full select-transfer-deselect transaction, only the muxes on the parent
0048 adapter are locked. Mux-locked muxes are mostly interesting if the
0049 select and/or deselect operations must use I2C transfers to complete
0050 their tasks. Since the parent adapter is not fully locked during the
0051 full transaction, unrelated I2C transfers may interleave the different
0052 stages of the transaction. This has the benefit that the mux driver
0053 may be easier and cleaner to implement, but it has some caveats.
0054
0055 Mux-locked Example
0056 ~~~~~~~~~~~~~~~~~~
0057
0058 ::
0059
0060 .----------. .--------.
0061 .--------. | mux- |-----| dev D1 |
0062 | root |--+--| locked | '--------'
0063 '--------' | | mux M1 |--. .--------.
0064 | '----------' '--| dev D2 |
0065 | .--------. '--------'
0066 '--| dev D3 |
0067 '--------'
0068
0069 When there is an access to D1, this happens:
0070
0071 1. Someone issues an I2C transfer to D1.
0072 2. M1 locks muxes on its parent (the root adapter in this case).
0073 3. M1 calls ->select to ready the mux.
0074 4. M1 (presumably) does some I2C transfers as part of its select.
0075 These transfers are normal I2C transfers that locks the parent
0076 adapter.
0077 5. M1 feeds the I2C transfer from step 1 to its parent adapter as a
0078 normal I2C transfer that locks the parent adapter.
0079 6. M1 calls ->deselect, if it has one.
0080 7. Same rules as in step 4, but for ->deselect.
0081 8. M1 unlocks muxes on its parent.
0082
0083 This means that accesses to D2 are lockout out for the full duration
0084 of the entire operation. But accesses to D3 are possibly interleaved
0085 at any point.
0086
0087 Mux-locked caveats
0088 ~~~~~~~~~~~~~~~~~~
0089
0090 When using a mux-locked mux, be aware of the following restrictions:
0091
0092 [ML1]
0093 If you build a topology with a mux-locked mux being the parent
0094 of a parent-locked mux, this might break the expectation from the
0095 parent-locked mux that the root adapter is locked during the
0096 transaction.
0097
0098 [ML2]
0099 It is not safe to build arbitrary topologies with two (or more)
0100 mux-locked muxes that are not siblings, when there are address
0101 collisions between the devices on the child adapters of these
0102 non-sibling muxes.
0103
0104 I.e. the select-transfer-deselect transaction targeting e.g. device
0105 address 0x42 behind mux-one may be interleaved with a similar
0106 operation targeting device address 0x42 behind mux-two. The
0107 intent with such a topology would in this hypothetical example
0108 be that mux-one and mux-two should not be selected simultaneously,
0109 but mux-locked muxes do not guarantee that in all topologies.
0110
0111 [ML3]
0112 A mux-locked mux cannot be used by a driver for auto-closing
0113 gates/muxes, i.e. something that closes automatically after a given
0114 number (one, in most cases) of I2C transfers. Unrelated I2C transfers
0115 may creep in and close prematurely.
0116
0117 [ML4]
0118 If any non-I2C operation in the mux driver changes the I2C mux state,
0119 the driver has to lock the root adapter during that operation.
0120 Otherwise garbage may appear on the bus as seen from devices
0121 behind the mux, when an unrelated I2C transfer is in flight during
0122 the non-I2C mux-changing operation.
0123
0124
0125 Parent-locked muxes
0126 -------------------
0127
0128 Parent-locked muxes lock the parent adapter during the full select-
0129 transfer-deselect transaction. The implication is that the mux driver
0130 has to ensure that any and all I2C transfers through that parent
0131 adapter during the transaction are unlocked I2C transfers (using e.g.
0132 __i2c_transfer), or a deadlock will follow.
0133
0134 Parent-locked Example
0135 ~~~~~~~~~~~~~~~~~~~~~
0136
0137 ::
0138
0139 .----------. .--------.
0140 .--------. | parent- |-----| dev D1 |
0141 | root |--+--| locked | '--------'
0142 '--------' | | mux M1 |--. .--------.
0143 | '----------' '--| dev D2 |
0144 | .--------. '--------'
0145 '--| dev D3 |
0146 '--------'
0147
0148 When there is an access to D1, this happens:
0149
0150 1. Someone issues an I2C transfer to D1.
0151 2. M1 locks muxes on its parent (the root adapter in this case).
0152 3. M1 locks its parent adapter.
0153 4. M1 calls ->select to ready the mux.
0154 5. If M1 does any I2C transfers (on this root adapter) as part of
0155 its select, those transfers must be unlocked I2C transfers so
0156 that they do not deadlock the root adapter.
0157 6. M1 feeds the I2C transfer from step 1 to the root adapter as an
0158 unlocked I2C transfer, so that it does not deadlock the parent
0159 adapter.
0160 7. M1 calls ->deselect, if it has one.
0161 8. Same rules as in step 5, but for ->deselect.
0162 9. M1 unlocks its parent adapter.
0163 10. M1 unlocks muxes on its parent.
0164
0165 This means that accesses to both D2 and D3 are locked out for the full
0166 duration of the entire operation.
0167
0168 Parent-locked Caveats
0169 ~~~~~~~~~~~~~~~~~~~~~
0170
0171 When using a parent-locked mux, be aware of the following restrictions:
0172
0173 [PL1]
0174 If you build a topology with a parent-locked mux being the child
0175 of another mux, this might break a possible assumption from the
0176 child mux that the root adapter is unused between its select op
0177 and the actual transfer (e.g. if the child mux is auto-closing
0178 and the parent mux issues I2C transfers as part of its select).
0179 This is especially the case if the parent mux is mux-locked, but
0180 it may also happen if the parent mux is parent-locked.
0181
0182 [PL2]
0183 If select/deselect calls out to other subsystems such as gpio,
0184 pinctrl, regmap or iio, it is essential that any I2C transfers
0185 caused by these subsystems are unlocked. This can be convoluted to
0186 accomplish, maybe even impossible if an acceptably clean solution
0187 is sought.
0188
0189
0190 Complex Examples
0191 ================
0192
0193 Parent-locked mux as parent of parent-locked mux
0194 ------------------------------------------------
0195
0196 This is a useful topology, but it can be bad::
0197
0198 .----------. .----------. .--------.
0199 .--------. | parent- |-----| parent- |-----| dev D1 |
0200 | root |--+--| locked | | locked | '--------'
0201 '--------' | | mux M1 |--. | mux M2 |--. .--------.
0202 | '----------' | '----------' '--| dev D2 |
0203 | .--------. | .--------. '--------'
0204 '--| dev D4 | '--| dev D3 |
0205 '--------' '--------'
0206
0207 When any device is accessed, all other devices are locked out for
0208 the full duration of the operation (both muxes lock their parent,
0209 and specifically when M2 requests its parent to lock, M1 passes
0210 the buck to the root adapter).
0211
0212 This topology is bad if M2 is an auto-closing mux and M1->select
0213 issues any unlocked I2C transfers on the root adapter that may leak
0214 through and be seen by the M2 adapter, thus closing M2 prematurely.
0215
0216
0217 Mux-locked mux as parent of mux-locked mux
0218 ------------------------------------------
0219
0220 This is a good topology::
0221
0222 .----------. .----------. .--------.
0223 .--------. | mux- |-----| mux- |-----| dev D1 |
0224 | root |--+--| locked | | locked | '--------'
0225 '--------' | | mux M1 |--. | mux M2 |--. .--------.
0226 | '----------' | '----------' '--| dev D2 |
0227 | .--------. | .--------. '--------'
0228 '--| dev D4 | '--| dev D3 |
0229 '--------' '--------'
0230
0231 When device D1 is accessed, accesses to D2 are locked out for the
0232 full duration of the operation (muxes on the top child adapter of M1
0233 are locked). But accesses to D3 and D4 are possibly interleaved at
0234 any point.
0235
0236 Accesses to D3 locks out D1 and D2, but accesses to D4 are still possibly
0237 interleaved.
0238
0239
0240 Mux-locked mux as parent of parent-locked mux
0241 ---------------------------------------------
0242
0243 This is probably a bad topology::
0244
0245 .----------. .----------. .--------.
0246 .--------. | mux- |-----| parent- |-----| dev D1 |
0247 | root |--+--| locked | | locked | '--------'
0248 '--------' | | mux M1 |--. | mux M2 |--. .--------.
0249 | '----------' | '----------' '--| dev D2 |
0250 | .--------. | .--------. '--------'
0251 '--| dev D4 | '--| dev D3 |
0252 '--------' '--------'
0253
0254 When device D1 is accessed, accesses to D2 and D3 are locked out
0255 for the full duration of the operation (M1 locks child muxes on the
0256 root adapter). But accesses to D4 are possibly interleaved at any
0257 point.
0258
0259 This kind of topology is generally not suitable and should probably
0260 be avoided. The reason is that M2 probably assumes that there will
0261 be no I2C transfers during its calls to ->select and ->deselect, and
0262 if there are, any such transfers might appear on the slave side of M2
0263 as partial I2C transfers, i.e. garbage or worse. This might cause
0264 device lockups and/or other problems.
0265
0266 The topology is especially troublesome if M2 is an auto-closing
0267 mux. In that case, any interleaved accesses to D4 might close M2
0268 prematurely, as might any I2C transfers part of M1->select.
0269
0270 But if M2 is not making the above stated assumption, and if M2 is not
0271 auto-closing, the topology is fine.
0272
0273
0274 Parent-locked mux as parent of mux-locked mux
0275 ---------------------------------------------
0276
0277 This is a good topology::
0278
0279 .----------. .----------. .--------.
0280 .--------. | parent- |-----| mux- |-----| dev D1 |
0281 | root |--+--| locked | | locked | '--------'
0282 '--------' | | mux M1 |--. | mux M2 |--. .--------.
0283 | '----------' | '----------' '--| dev D2 |
0284 | .--------. | .--------. '--------'
0285 '--| dev D4 | '--| dev D3 |
0286 '--------' '--------'
0287
0288 When D1 is accessed, accesses to D2 are locked out for the full
0289 duration of the operation (muxes on the top child adapter of M1
0290 are locked). Accesses to D3 and D4 are possibly interleaved at
0291 any point, just as is expected for mux-locked muxes.
0292
0293 When D3 or D4 are accessed, everything else is locked out. For D3
0294 accesses, M1 locks the root adapter. For D4 accesses, the root
0295 adapter is locked directly.
0296
0297
0298 Two mux-locked sibling muxes
0299 ----------------------------
0300
0301 This is a good topology::
0302
0303 .--------.
0304 .----------. .--| dev D1 |
0305 | mux- |--' '--------'
0306 .--| locked | .--------.
0307 | | mux M1 |-----| dev D2 |
0308 | '----------' '--------'
0309 | .----------. .--------.
0310 .--------. | | mux- |-----| dev D3 |
0311 | root |--+--| locked | '--------'
0312 '--------' | | mux M2 |--. .--------.
0313 | '----------' '--| dev D4 |
0314 | .--------. '--------'
0315 '--| dev D5 |
0316 '--------'
0317
0318 When D1 is accessed, accesses to D2, D3 and D4 are locked out. But
0319 accesses to D5 may be interleaved at any time.
0320
0321
0322 Two parent-locked sibling muxes
0323 -------------------------------
0324
0325 This is a good topology::
0326
0327 .--------.
0328 .----------. .--| dev D1 |
0329 | parent- |--' '--------'
0330 .--| locked | .--------.
0331 | | mux M1 |-----| dev D2 |
0332 | '----------' '--------'
0333 | .----------. .--------.
0334 .--------. | | parent- |-----| dev D3 |
0335 | root |--+--| locked | '--------'
0336 '--------' | | mux M2 |--. .--------.
0337 | '----------' '--| dev D4 |
0338 | .--------. '--------'
0339 '--| dev D5 |
0340 '--------'
0341
0342 When any device is accessed, accesses to all other devices are locked
0343 out.
0344
0345
0346 Mux-locked and parent-locked sibling muxes
0347 ------------------------------------------
0348
0349 This is a good topology::
0350
0351 .--------.
0352 .----------. .--| dev D1 |
0353 | mux- |--' '--------'
0354 .--| locked | .--------.
0355 | | mux M1 |-----| dev D2 |
0356 | '----------' '--------'
0357 | .----------. .--------.
0358 .--------. | | parent- |-----| dev D3 |
0359 | root |--+--| locked | '--------'
0360 '--------' | | mux M2 |--. .--------.
0361 | '----------' '--| dev D4 |
0362 | .--------. '--------'
0363 '--| dev D5 |
0364 '--------'
0365
0366 When D1 or D2 are accessed, accesses to D3 and D4 are locked out while
0367 accesses to D5 may interleave. When D3 or D4 are accessed, accesses to
0368 all other devices are locked out.
0369
0370
0371 Mux type of existing device drivers
0372 ===================================
0373
0374 Whether a device is mux-locked or parent-locked depends on its
0375 implementation. The following list was correct at the time of writing:
0376
0377 In drivers/i2c/muxes/:
0378
0379 ====================== =============================================
0380 i2c-arb-gpio-challenge Parent-locked
0381 i2c-mux-gpio Normally parent-locked, mux-locked iff
0382 all involved gpio pins are controlled by the
0383 same I2C root adapter that they mux.
0384 i2c-mux-gpmux Normally parent-locked, mux-locked iff
0385 specified in device-tree.
0386 i2c-mux-ltc4306 Mux-locked
0387 i2c-mux-mlxcpld Parent-locked
0388 i2c-mux-pca9541 Parent-locked
0389 i2c-mux-pca954x Parent-locked
0390 i2c-mux-pinctrl Normally parent-locked, mux-locked iff
0391 all involved pinctrl devices are controlled
0392 by the same I2C root adapter that they mux.
0393 i2c-mux-reg Parent-locked
0394 ====================== =============================================
0395
0396 In drivers/iio/:
0397
0398 ====================== =============================================
0399 gyro/mpu3050 Mux-locked
0400 imu/inv_mpu6050/ Mux-locked
0401 ====================== =============================================
0402
0403 In drivers/media/:
0404
0405 ======================= =============================================
0406 dvb-frontends/lgdt3306a Mux-locked
0407 dvb-frontends/m88ds3103 Parent-locked
0408 dvb-frontends/rtl2830 Parent-locked
0409 dvb-frontends/rtl2832 Mux-locked
0410 dvb-frontends/si2168 Mux-locked
0411 usb/cx231xx/ Parent-locked
0412 ======================= =============================================
