0001 .. SPDX-License-Identifier: GPL-2.0-or-later
0002
0003 Kernel driver sbtsi_temp
0004 ========================
0005
0006 Supported hardware:
0007
0008 * Sideband interface (SBI) Temperature Sensor Interface (SB-TSI)
0009 compliant AMD SoC temperature device.
0010
0011 Prefix: 'sbtsi_temp'
0012
0013 Addresses scanned: This driver doesn't support address scanning.
0014
0015 To instantiate this driver on an AMD CPU with SB-TSI
0016 support, the i2c bus number would be the bus connected from the board
0017 management controller (BMC) to the CPU. The i2c address is specified in
0018 Section 6.3.1 of the SoC register reference: The SB-TSI address is normally
0019 98h for socket 0 and 90h for socket 1, but it could vary based on hardware
0020 address select pins.
0021
0022 Datasheet: The SB-TSI interface and protocol is available as part of
0023 the open source SoC register reference at:
0024
0025 https://www.amd.com/system/files/TechDocs/56255_OSRR.pdf
0026
0027 The Advanced Platform Management Link (APML) Specification is
0028 available at:
0029
0030 http://developer.amd.com/wordpress/media/2012/10/41918.pdf
0031
0032 Author: Kun Yi <kunyi@google.com>
0033
0034 Description
0035 -----------
0036
0037 The SBI temperature sensor interface (SB-TSI) is an emulation of the software
0038 and physical interface of a typical 8-pin remote temperature sensor (RTS) on
0039 AMD SoCs. It implements one temperature sensor with readings and limit
0040 registers encode the temperature in increments of 0.125 from 0 to 255.875.
0041 Limits can be set through the writable thresholds, and if reached will trigger
0042 corresponding alert signals.
