0001 ===========================
0002 drm/i915 Intel GFX Driver
0003 ===========================
0004
0005 The drm/i915 driver supports all (with the exception of some very early
0006 models) integrated GFX chipsets with both Intel display and rendering
0007 blocks. This excludes a set of SoC platforms with an SGX rendering unit,
0008 those have basic support through the gma500 drm driver.
0009
0010 Core Driver Infrastructure
0011 ==========================
0012
0013 This section covers core driver infrastructure used by both the display
0014 and the GEM parts of the driver.
0015
0016 Runtime Power Management
0017 ------------------------
0018
0019 .. kernel-doc:: drivers/gpu/drm/i915/intel_runtime_pm.c
0020 :doc: runtime pm
0021
0022 .. kernel-doc:: drivers/gpu/drm/i915/intel_runtime_pm.c
0023 :internal:
0024
0025 .. kernel-doc:: drivers/gpu/drm/i915/intel_uncore.c
0026 :internal:
0027
0028 Interrupt Handling
0029 ------------------
0030
0031 .. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
0032 :doc: interrupt handling
0033
0034 .. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
0035 :functions: intel_irq_init intel_irq_init_hw intel_hpd_init
0036
0037 .. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
0038 :functions: intel_runtime_pm_disable_interrupts
0039
0040 .. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
0041 :functions: intel_runtime_pm_enable_interrupts
0042
0043 Intel GVT-g Guest Support(vGPU)
0044 -------------------------------
0045
0046 .. kernel-doc:: drivers/gpu/drm/i915/i915_vgpu.c
0047 :doc: Intel GVT-g guest support
0048
0049 .. kernel-doc:: drivers/gpu/drm/i915/i915_vgpu.c
0050 :internal:
0051
0052 Intel GVT-g Host Support(vGPU device model)
0053 -------------------------------------------
0054
0055 .. kernel-doc:: drivers/gpu/drm/i915/intel_gvt.c
0056 :doc: Intel GVT-g host support
0057
0058 .. kernel-doc:: drivers/gpu/drm/i915/intel_gvt.c
0059 :internal:
0060
0061 Workarounds
0062 -----------
0063
0064 .. kernel-doc:: drivers/gpu/drm/i915/gt/intel_workarounds.c
0065 :doc: Hardware workarounds
0066
0067 Display Hardware Handling
0068 =========================
0069
0070 This section covers everything related to the display hardware including
0071 the mode setting infrastructure, plane, sprite and cursor handling and
0072 display, output probing and related topics.
0073
0074 Mode Setting Infrastructure
0075 ---------------------------
0076
0077 The i915 driver is thus far the only DRM driver which doesn't use the
0078 common DRM helper code to implement mode setting sequences. Thus it has
0079 its own tailor-made infrastructure for executing a display configuration
0080 change.
0081
0082 Frontbuffer Tracking
0083 --------------------
0084
0085 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_frontbuffer.c
0086 :doc: frontbuffer tracking
0087
0088 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_frontbuffer.h
0089 :internal:
0090
0091 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_frontbuffer.c
0092 :internal:
0093
0094 Display FIFO Underrun Reporting
0095 -------------------------------
0096
0097 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_fifo_underrun.c
0098 :doc: fifo underrun handling
0099
0100 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_fifo_underrun.c
0101 :internal:
0102
0103 Plane Configuration
0104 -------------------
0105
0106 This section covers plane configuration and composition with the primary
0107 plane, sprites, cursors and overlays. This includes the infrastructure
0108 to do atomic vsync'ed updates of all this state and also tightly coupled
0109 topics like watermark setup and computation, framebuffer compression and
0110 panel self refresh.
0111
0112 Atomic Plane Helpers
0113 --------------------
0114
0115 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_atomic_plane.c
0116 :doc: atomic plane helpers
0117
0118 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_atomic_plane.c
0119 :internal:
0120
0121 Asynchronous Page Flip
0122 ----------------------
0123
0124 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_display.c
0125 :doc: asynchronous flip implementation
0126
0127 Output Probing
0128 --------------
0129
0130 This section covers output probing and related infrastructure like the
0131 hotplug interrupt storm detection and mitigation code. Note that the
0132 i915 driver still uses most of the common DRM helper code for output
0133 probing, so those sections fully apply.
0134
0135 Hotplug
0136 -------
0137
0138 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_hotplug.c
0139 :doc: Hotplug
0140
0141 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_hotplug.c
0142 :internal:
0143
0144 High Definition Audio
0145 ---------------------
0146
0147 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_audio.c
0148 :doc: High Definition Audio over HDMI and Display Port
0149
0150 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_audio.c
0151 :internal:
0152
0153 .. kernel-doc:: include/drm/i915_component.h
0154 :internal:
0155
0156 Intel HDMI LPE Audio Support
0157 ----------------------------
0158
0159 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_lpe_audio.c
0160 :doc: LPE Audio integration for HDMI or DP playback
0161
0162 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_lpe_audio.c
0163 :internal:
0164
0165 Panel Self Refresh PSR (PSR/SRD)
0166 --------------------------------
0167
0168 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_psr.c
0169 :doc: Panel Self Refresh (PSR/SRD)
0170
0171 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_psr.c
0172 :internal:
0173
0174 Frame Buffer Compression (FBC)
0175 ------------------------------
0176
0177 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_fbc.c
0178 :doc: Frame Buffer Compression (FBC)
0179
0180 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_fbc.c
0181 :internal:
0182
0183 Display Refresh Rate Switching (DRRS)
0184 -------------------------------------
0185
0186 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_drrs.c
0187 :doc: Display Refresh Rate Switching (DRRS)
0188
0189 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_drrs.c
0190 :internal:
0191
0192 DPIO
0193 ----
0194
0195 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_dpio_phy.c
0196 :doc: DPIO
0197
0198 DMC Firmware Support
0199 --------------------
0200
0201 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_dmc.c
0202 :doc: DMC Firmware Support
0203
0204 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_dmc.c
0205 :internal:
0206
0207 Video BIOS Table (VBT)
0208 ----------------------
0209
0210 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_bios.c
0211 :doc: Video BIOS Table (VBT)
0212
0213 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_bios.c
0214 :internal:
0215
0216 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_vbt_defs.h
0217 :internal:
0218
0219 Display clocks
0220 --------------
0221
0222 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_cdclk.c
0223 :doc: CDCLK / RAWCLK
0224
0225 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_cdclk.c
0226 :internal:
0227
0228 Display PLLs
0229 ------------
0230
0231 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_dpll_mgr.c
0232 :doc: Display PLLs
0233
0234 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_dpll_mgr.c
0235 :internal:
0236
0237 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_dpll_mgr.h
0238 :internal:
0239
0240 Display State Buffer
0241 --------------------
0242
0243 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_dsb.c
0244 :doc: DSB
0245
0246 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_dsb.c
0247 :internal:
0248
0249 GT Programming
0250 ==============
0251
0252 Multicast/Replicated (MCR) Registers
0253 ------------------------------------
0254
0255 .. kernel-doc:: drivers/gpu/drm/i915/gt/intel_gt_mcr.c
0256 :doc: GT Multicast/Replicated (MCR) Register Support
0257
0258 .. kernel-doc:: drivers/gpu/drm/i915/gt/intel_gt_mcr.c
0259 :internal:
0260
0261 Memory Management and Command Submission
0262 ========================================
0263
0264 This sections covers all things related to the GEM implementation in the
0265 i915 driver.
0266
0267 Intel GPU Basics
0268 ----------------
0269
0270 An Intel GPU has multiple engines. There are several engine types.
0271
0272 - RCS engine is for rendering 3D and performing compute, this is named
0273 `I915_EXEC_RENDER` in user space.
0274 - BCS is a blitting (copy) engine, this is named `I915_EXEC_BLT` in user
0275 space.
0276 - VCS is a video encode and decode engine, this is named `I915_EXEC_BSD`
0277 in user space
0278 - VECS is video enhancement engine, this is named `I915_EXEC_VEBOX` in user
0279 space.
0280 - The enumeration `I915_EXEC_DEFAULT` does not refer to specific engine;
0281 instead it is to be used by user space to specify a default rendering
0282 engine (for 3D) that may or may not be the same as RCS.
0283
0284 The Intel GPU family is a family of integrated GPU's using Unified
0285 Memory Access. For having the GPU "do work", user space will feed the
0286 GPU batch buffers via one of the ioctls `DRM_IOCTL_I915_GEM_EXECBUFFER2`
0287 or `DRM_IOCTL_I915_GEM_EXECBUFFER2_WR`. Most such batchbuffers will
0288 instruct the GPU to perform work (for example rendering) and that work
0289 needs memory from which to read and memory to which to write. All memory
0290 is encapsulated within GEM buffer objects (usually created with the ioctl
0291 `DRM_IOCTL_I915_GEM_CREATE`). An ioctl providing a batchbuffer for the GPU
0292 to create will also list all GEM buffer objects that the batchbuffer reads
0293 and/or writes. For implementation details of memory management see
0294 `GEM BO Management Implementation Details`_.
0295
0296 The i915 driver allows user space to create a context via the ioctl
0297 `DRM_IOCTL_I915_GEM_CONTEXT_CREATE` which is identified by a 32-bit
0298 integer. Such a context should be viewed by user-space as -loosely-
0299 analogous to the idea of a CPU process of an operating system. The i915
0300 driver guarantees that commands issued to a fixed context are to be
0301 executed so that writes of a previously issued command are seen by
0302 reads of following commands. Actions issued between different contexts
0303 (even if from the same file descriptor) are NOT given that guarantee
0304 and the only way to synchronize across contexts (even from the same
0305 file descriptor) is through the use of fences. At least as far back as
0306 Gen4, also have that a context carries with it a GPU HW context;
0307 the HW context is essentially (most of atleast) the state of a GPU.
0308 In addition to the ordering guarantees, the kernel will restore GPU
0309 state via HW context when commands are issued to a context, this saves
0310 user space the need to restore (most of atleast) the GPU state at the
0311 start of each batchbuffer. The non-deprecated ioctls to submit batchbuffer
0312 work can pass that ID (in the lower bits of drm_i915_gem_execbuffer2::rsvd1)
0313 to identify what context to use with the command.
0314
0315 The GPU has its own memory management and address space. The kernel
0316 driver maintains the memory translation table for the GPU. For older
0317 GPUs (i.e. those before Gen8), there is a single global such translation
0318 table, a global Graphics Translation Table (GTT). For newer generation
0319 GPUs each context has its own translation table, called Per-Process
0320 Graphics Translation Table (PPGTT). Of important note, is that although
0321 PPGTT is named per-process it is actually per context. When user space
0322 submits a batchbuffer, the kernel walks the list of GEM buffer objects
0323 used by the batchbuffer and guarantees that not only is the memory of
0324 each such GEM buffer object resident but it is also present in the
0325 (PP)GTT. If the GEM buffer object is not yet placed in the (PP)GTT,
0326 then it is given an address. Two consequences of this are: the kernel
0327 needs to edit the batchbuffer submitted to write the correct value of
0328 the GPU address when a GEM BO is assigned a GPU address and the kernel
0329 might evict a different GEM BO from the (PP)GTT to make address room
0330 for another GEM BO. Consequently, the ioctls submitting a batchbuffer
0331 for execution also include a list of all locations within buffers that
0332 refer to GPU-addresses so that the kernel can edit the buffer correctly.
0333 This process is dubbed relocation.
0334
0335 Locking Guidelines
0336 ------------------
0337
0338 .. note::
0339 This is a description of how the locking should be after
0340 refactoring is done. Does not necessarily reflect what the locking
0341 looks like while WIP.
0342
0343 #. All locking rules and interface contracts with cross-driver interfaces
0344 (dma-buf, dma_fence) need to be followed.
0345
0346 #. No struct_mutex anywhere in the code
0347
0348 #. dma_resv will be the outermost lock (when needed) and ww_acquire_ctx
0349 is to be hoisted at highest level and passed down within i915_gem_ctx
0350 in the call chain
0351
0352 #. While holding lru/memory manager (buddy, drm_mm, whatever) locks
0353 system memory allocations are not allowed
0354
0355 * Enforce this by priming lockdep (with fs_reclaim). If we
0356 allocate memory while holding these looks we get a rehash
0357 of the shrinker vs. struct_mutex saga, and that would be
0358 real bad.
0359
0360 #. Do not nest different lru/memory manager locks within each other.
0361 Take them in turn to update memory allocations, relying on the object’s
0362 dma_resv ww_mutex to serialize against other operations.
0363
0364 #. The suggestion for lru/memory managers locks is that they are small
0365 enough to be spinlocks.
0366
0367 #. All features need to come with exhaustive kernel selftests and/or
0368 IGT tests when appropriate
0369
0370 #. All LMEM uAPI paths need to be fully restartable (_interruptible()
0371 for all locks/waits/sleeps)
0372
0373 * Error handling validation through signal injection.
0374 Still the best strategy we have for validating GEM uAPI
0375 corner cases.
0376 Must be excessively used in the IGT, and we need to check
0377 that we really have full path coverage of all error cases.
0378
0379 * -EDEADLK handling with ww_mutex
0380
0381 GEM BO Management Implementation Details
0382 ----------------------------------------
0383
0384 .. kernel-doc:: drivers/gpu/drm/i915/i915_vma_types.h
0385 :doc: Virtual Memory Address
0386
0387 Buffer Object Eviction
0388 ----------------------
0389
0390 This section documents the interface functions for evicting buffer
0391 objects to make space available in the virtual gpu address spaces. Note
0392 that this is mostly orthogonal to shrinking buffer objects caches, which
0393 has the goal to make main memory (shared with the gpu through the
0394 unified memory architecture) available.
0395
0396 .. kernel-doc:: drivers/gpu/drm/i915/i915_gem_evict.c
0397 :internal:
0398
0399 Buffer Object Memory Shrinking
0400 ------------------------------
0401
0402 This section documents the interface function for shrinking memory usage
0403 of buffer object caches. Shrinking is used to make main memory
0404 available. Note that this is mostly orthogonal to evicting buffer
0405 objects, which has the goal to make space in gpu virtual address spaces.
0406
0407 .. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
0408 :internal:
0409
0410 Batchbuffer Parsing
0411 -------------------
0412
0413 .. kernel-doc:: drivers/gpu/drm/i915/i915_cmd_parser.c
0414 :doc: batch buffer command parser
0415
0416 .. kernel-doc:: drivers/gpu/drm/i915/i915_cmd_parser.c
0417 :internal:
0418
0419 User Batchbuffer Execution
0420 --------------------------
0421
0422 .. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_context_types.h
0423
0424 .. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
0425 :doc: User command execution
0426
0427 Scheduling
0428 ----------
0429 .. kernel-doc:: drivers/gpu/drm/i915/i915_scheduler_types.h
0430 :functions: i915_sched_engine
0431
0432 Logical Rings, Logical Ring Contexts and Execlists
0433 --------------------------------------------------
0434
0435 .. kernel-doc:: drivers/gpu/drm/i915/gt/intel_execlists_submission.c
0436 :doc: Logical Rings, Logical Ring Contexts and Execlists
0437
0438 Global GTT views
0439 ----------------
0440
0441 .. kernel-doc:: drivers/gpu/drm/i915/i915_vma_types.h
0442 :doc: Global GTT views
0443
0444 .. kernel-doc:: drivers/gpu/drm/i915/i915_gem_gtt.c
0445 :internal:
0446
0447 GTT Fences and Swizzling
0448 ------------------------
0449
0450 .. kernel-doc:: drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
0451 :internal:
0452
0453 Global GTT Fence Handling
0454 ~~~~~~~~~~~~~~~~~~~~~~~~~
0455
0456 .. kernel-doc:: drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
0457 :doc: fence register handling
0458
0459 Hardware Tiling and Swizzling Details
0460 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
0461
0462 .. kernel-doc:: drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
0463 :doc: tiling swizzling details
0464
0465 Object Tiling IOCTLs
0466 --------------------
0467
0468 .. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_tiling.c
0469 :internal:
0470
0471 .. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_tiling.c
0472 :doc: buffer object tiling
0473
0474 Protected Objects
0475 -----------------
0476
0477 .. kernel-doc:: drivers/gpu/drm/i915/pxp/intel_pxp.c
0478 :doc: PXP
0479
0480 .. kernel-doc:: drivers/gpu/drm/i915/pxp/intel_pxp_types.h
0481
0482 Microcontrollers
0483 ================
0484
0485 Starting from gen9, three microcontrollers are available on the HW: the
0486 graphics microcontroller (GuC), the HEVC/H.265 microcontroller (HuC) and the
0487 display microcontroller (DMC). The driver is responsible for loading the
0488 firmwares on the microcontrollers; the GuC and HuC firmwares are transferred
0489 to WOPCM using the DMA engine, while the DMC firmware is written through MMIO.
0490
0491 WOPCM
0492 -----
0493
0494 WOPCM Layout
0495 ~~~~~~~~~~~~
0496
0497 .. kernel-doc:: drivers/gpu/drm/i915/intel_wopcm.c
0498 :doc: WOPCM Layout
0499
0500 GuC
0501 ---
0502
0503 .. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc.c
0504 :doc: GuC
0505
0506 .. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc.h
0507
0508 GuC Firmware Layout
0509 ~~~~~~~~~~~~~~~~~~~
0510
0511 .. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
0512 :doc: Firmware Layout
0513
0514 GuC Memory Management
0515 ~~~~~~~~~~~~~~~~~~~~~
0516
0517 .. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc.c
0518 :doc: GuC Memory Management
0519 .. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc.c
0520 :functions: intel_guc_allocate_vma
0521
0522
0523 GuC-specific firmware loader
0524 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
0525
0526 .. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
0527 :internal:
0528
0529 GuC-based command submission
0530 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
0531
0532 .. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
0533 :doc: GuC-based command submission
0534
0535 GuC ABI
0536 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
0537
0538 .. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_messages_abi.h
0539 .. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_communication_mmio_abi.h
0540 .. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_communication_ctb_abi.h
0541 .. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
0542 .. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h
0543
0544 HuC
0545 ---
0546 .. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_huc.c
0547 :doc: HuC
0548 .. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_huc.c
0549 :functions: intel_huc_auth
0550
0551 HuC Memory Management
0552 ~~~~~~~~~~~~~~~~~~~~~
0553
0554 .. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_huc.c
0555 :doc: HuC Memory Management
0556
0557 HuC Firmware Layout
0558 ~~~~~~~~~~~~~~~~~~~
0559 The HuC FW layout is the same as the GuC one, see `GuC Firmware Layout`_
0560
0561 DMC
0562 ---
0563 See `DMC Firmware Support`_
0564
0565 Tracing
0566 =======
0567
0568 This sections covers all things related to the tracepoints implemented
0569 in the i915 driver.
0570
0571 i915_ppgtt_create and i915_ppgtt_release
0572 ----------------------------------------
0573
0574 .. kernel-doc:: drivers/gpu/drm/i915/i915_trace.h
0575 :doc: i915_ppgtt_create and i915_ppgtt_release tracepoints
0576
0577 i915_context_create and i915_context_free
0578 -----------------------------------------
0579
0580 .. kernel-doc:: drivers/gpu/drm/i915/i915_trace.h
0581 :doc: i915_context_create and i915_context_free tracepoints
0582
0583 Perf
0584 ====
0585
0586 Overview
0587 --------
0588 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0589 :doc: i915 Perf Overview
0590
0591 Comparison with Core Perf
0592 -------------------------
0593 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0594 :doc: i915 Perf History and Comparison with Core Perf
0595
0596 i915 Driver Entry Points
0597 ------------------------
0598
0599 This section covers the entrypoints exported outside of i915_perf.c to
0600 integrate with drm/i915 and to handle the `DRM_I915_PERF_OPEN` ioctl.
0601
0602 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0603 :functions: i915_perf_init
0604 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0605 :functions: i915_perf_fini
0606 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0607 :functions: i915_perf_register
0608 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0609 :functions: i915_perf_unregister
0610 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0611 :functions: i915_perf_open_ioctl
0612 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0613 :functions: i915_perf_release
0614 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0615 :functions: i915_perf_add_config_ioctl
0616 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0617 :functions: i915_perf_remove_config_ioctl
0618
0619 i915 Perf Stream
0620 ----------------
0621
0622 This section covers the stream-semantics-agnostic structures and functions
0623 for representing an i915 perf stream FD and associated file operations.
0624
0625 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf_types.h
0626 :functions: i915_perf_stream
0627 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf_types.h
0628 :functions: i915_perf_stream_ops
0629
0630 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0631 :functions: read_properties_unlocked
0632 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0633 :functions: i915_perf_open_ioctl_locked
0634 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0635 :functions: i915_perf_destroy_locked
0636 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0637 :functions: i915_perf_read
0638 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0639 :functions: i915_perf_ioctl
0640 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0641 :functions: i915_perf_enable_locked
0642 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0643 :functions: i915_perf_disable_locked
0644 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0645 :functions: i915_perf_poll
0646 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0647 :functions: i915_perf_poll_locked
0648
0649 i915 Perf Observation Architecture Stream
0650 -----------------------------------------
0651
0652 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf_types.h
0653 :functions: i915_oa_ops
0654
0655 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0656 :functions: i915_oa_stream_init
0657 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0658 :functions: i915_oa_read
0659 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0660 :functions: i915_oa_stream_enable
0661 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0662 :functions: i915_oa_stream_disable
0663 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0664 :functions: i915_oa_wait_unlocked
0665 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0666 :functions: i915_oa_poll_wait
0667
0668 Other i915 Perf Internals
0669 -------------------------
0670
0671 This section simply includes all other currently documented i915 perf internals,
0672 in no particular order, but may include some more minor utilities or platform
0673 specific details than found in the more high-level sections.
0674
0675 .. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
0676 :internal:
0677 :no-identifiers:
0678 i915_perf_init
0679 i915_perf_fini
0680 i915_perf_register
0681 i915_perf_unregister
0682 i915_perf_open_ioctl
0683 i915_perf_release
0684 i915_perf_add_config_ioctl
0685 i915_perf_remove_config_ioctl
0686 read_properties_unlocked
0687 i915_perf_open_ioctl_locked
0688 i915_perf_destroy_locked
0689 i915_perf_read i915_perf_ioctl
0690 i915_perf_enable_locked
0691 i915_perf_disable_locked
0692 i915_perf_poll i915_perf_poll_locked
0693 i915_oa_stream_init i915_oa_read
0694 i915_oa_stream_enable
0695 i915_oa_stream_disable
0696 i915_oa_wait_unlocked
0697 i915_oa_poll_wait
0698
0699 Style
0700 =====
0701
0702 The drm/i915 driver codebase has some style rules in addition to (and, in some
0703 cases, deviating from) the kernel coding style.
0704
0705 Register macro definition style
0706 -------------------------------
0707
0708 The style guide for ``i915_reg.h``.
0709
0710 .. kernel-doc:: drivers/gpu/drm/i915/i915_reg.h
0711 :doc: The i915 register macro definition style guide
0712
0713 .. _i915-usage-stats:
0714
0715 i915 DRM client usage stats implementation
0716 ==========================================
0717
0718 The drm/i915 driver implements the DRM client usage stats specification as
0719 documented in :ref:`drm-client-usage-stats`.
0720
0721 Example of the output showing the implemented key value pairs and entirety of
0722 the currently possible format options:
0723
0724 ::
0725
0726 pos: 0
0727 flags: 0100002
0728 mnt_id: 21
0729 drm-driver: i915
0730 drm-pdev: 0000:00:02.0
0731 drm-client-id: 7
0732 drm-engine-render: 9288864723 ns
0733 drm-engine-copy: 2035071108 ns
0734 drm-engine-video: 0 ns
0735 drm-engine-capacity-video: 2
0736 drm-engine-video-enhance: 0 ns
0737
0738 Possible `drm-engine-` key names are: `render`, `copy`, `video` and
0739 `video-enhance`.
