0001 ===========
0002 DC Glossary
0003 ===========
0004
0005 On this page, we try to keep track of acronyms related to the display
0006 component. If you do not find what you are looking for, look at the
0007 'Documentation/gpu/amdgpu/amdgpu-glossary.rst'; if you cannot find it anywhere,
0008 consider asking in the amdgfx and update this page.
0009
0010 .. glossary::
0011
0012 ABM
0013 Adaptive Backlight Modulation
0014
0015 APU
0016 Accelerated Processing Unit
0017
0018 ASIC
0019 Application-Specific Integrated Circuit
0020
0021 ASSR
0022 Alternate Scrambler Seed Reset
0023
0024 AZ
0025 Azalia (HD audio DMA engine)
0026
0027 BPC
0028 Bits Per Colour/Component
0029
0030 BPP
0031 Bits Per Pixel
0032
0033 Clocks
0034 * PCLK: Pixel Clock
0035 * SYMCLK: Symbol Clock
0036 * SOCCLK: GPU Engine Clock
0037 * DISPCLK: Display Clock
0038 * DPPCLK: DPP Clock
0039 * DCFCLK: Display Controller Fabric Clock
0040 * REFCLK: Real Time Reference Clock
0041 * PPLL: Pixel PLL
0042 * FCLK: Fabric Clock
0043 * MCLK: Memory Clock
0044
0045 CRC
0046 Cyclic Redundancy Check
0047
0048 CRTC
0049 Cathode Ray Tube Controller - commonly called "Controller" - Generates
0050 raw stream of pixels, clocked at pixel clock
0051
0052 CVT
0053 Coordinated Video Timings
0054
0055 DAL
0056 Display Abstraction layer
0057
0058 DC (Software)
0059 Display Core
0060
0061 DC (Hardware)
0062 Display Controller
0063
0064 DCC
0065 Delta Colour Compression
0066
0067 DCE
0068 Display Controller Engine
0069
0070 DCHUB
0071 Display Controller HUB
0072
0073 ARB
0074 Arbiter
0075
0076 VTG
0077 Vertical Timing Generator
0078
0079 DCN
0080 Display Core Next
0081
0082 DCCG
0083 Display Clock Generator block
0084
0085 DDC
0086 Display Data Channel
0087
0088 DIO
0089 Display IO
0090
0091 DPP
0092 Display Pipes and Planes
0093
0094 DSC
0095 Display Stream Compression (Reduce the amount of bits to represent pixel
0096 count while at the same pixel clock)
0097
0098 dGPU
0099 discrete GPU
0100
0101 DMIF
0102 Display Memory Interface
0103
0104 DML
0105 Display Mode Library
0106
0107 DMCU
0108 Display Micro-Controller Unit
0109
0110 DMCUB
0111 Display Micro-Controller Unit, version B
0112
0113 DPCD
0114 DisplayPort Configuration Data
0115
0116 DPM(S)
0117 Display Power Management (Signaling)
0118
0119 DRR
0120 Dynamic Refresh Rate
0121
0122 DWB
0123 Display Writeback
0124
0125 FB
0126 Frame Buffer
0127
0128 FBC
0129 Frame Buffer Compression
0130
0131 FEC
0132 Forward Error Correction
0133
0134 FRL
0135 Fixed Rate Link
0136
0137 GCO
0138 Graphical Controller Object
0139
0140 GSL
0141 Global Swap Lock
0142
0143 iGPU
0144 integrated GPU
0145
0146 ISR
0147 Interrupt Service Request
0148
0149 ISV
0150 Independent Software Vendor
0151
0152 KMD
0153 Kernel Mode Driver
0154
0155 LB
0156 Line Buffer
0157
0158 LFC
0159 Low Framerate Compensation
0160
0161 LTTPR
0162 Link Training Tunable Phy Repeater
0163
0164 LUT
0165 Lookup Table
0166
0167 MALL
0168 Memory Access at Last Level
0169
0170 MC
0171 Memory Controller
0172
0173 MPC
0174 Multiple pipes and plane combine
0175
0176 MPO
0177 Multi Plane Overlay
0178
0179 MST
0180 Multi Stream Transport
0181
0182 NBP State
0183 Northbridge Power State
0184
0185 NBIO
0186 North Bridge Input/Output
0187
0188 ODM
0189 Output Data Mapping
0190
0191 OPM
0192 Output Protection Manager
0193
0194 OPP
0195 Output Plane Processor
0196
0197 OPTC
0198 Output Pipe Timing Combiner
0199
0200 OTG
0201 Output Timing Generator
0202
0203 PCON
0204 Power Controller
0205
0206 PGFSM
0207 Power Gate Finite State Machine
0208
0209 PSR
0210 Panel Self Refresh
0211
0212 SCL
0213 Scaler
0214
0215 SDP
0216 Scalable Data Port
0217
0218 SLS
0219 Single Large Surface
0220
0221 SST
0222 Single Stream Transport
0223
0224 TMDS
0225 Transition-Minimized Differential Signaling
0226
0227 TMZ
0228 Trusted Memory Zone
0229
0230 TTU
0231 Time to Underflow
0232
0233 VRR
0234 Variable Refresh Rate
0235
0236 UVD
0237 Unified Video Decoder
