0001 #
0002 # Feature name: membarrier-sync-core
0003 # Kconfig: ARCH_HAS_MEMBARRIER_SYNC_CORE
0004 # description: arch supports core serializing membarrier
0005 #
0006 # Architecture requirements
0007 #
0008 # * arm/arm64/powerpc
0009 #
0010 # Rely on implicit context synchronization as a result of exception return
0011 # when returning from IPI handler, and when returning to user-space.
0012 #
0013 # * x86
0014 #
0015 # x86-32 uses IRET as return from interrupt, which takes care of the IPI.
0016 # However, it uses both IRET and SYSEXIT to go back to user-space. The IRET
0017 # instruction is core serializing, but not SYSEXIT.
0018 #
0019 # x86-64 uses IRET as return from interrupt, which takes care of the IPI.
0020 # However, it can return to user-space through either SYSRETL (compat code),
0021 # SYSRETQ, or IRET.
0022 #
0023 # Given that neither SYSRET{L,Q}, nor SYSEXIT, are core serializing, we rely
0024 # instead on write_cr3() performed by switch_mm() to provide core serialization
0025 # after changing the current mm, and deal with the special case of kthread ->
0026 # uthread (temporarily keeping current mm into active_mm) by issuing a
0027 # sync_core_before_usermode() in that specific case.
0028 #
0029 -----------------------
0030 | arch |status|
0031 -----------------------
0032 | alpha: | TODO |
0033 | arc: | TODO |
0034 | arm: | ok |
0035 | arm64: | ok |
0036 | csky: | TODO |
0037 | hexagon: | TODO |
0038 | ia64: | TODO |
0039 | loong: | TODO |
0040 | m68k: | TODO |
0041 | microblaze: | TODO |
0042 | mips: | TODO |
0043 | nios2: | TODO |
0044 | openrisc: | TODO |
0045 | parisc: | TODO |
0046 | powerpc: | ok |
0047 | riscv: | TODO |
0048 | s390: | TODO |
0049 | sh: | TODO |
0050 | sparc: | TODO |
0051 | um: | TODO |
0052 | x86: | ok |
0053 | xtensa: | TODO |
0054 -----------------------
