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0001 ================================================
0002 SH7760/SH7763 integrated LCDC Framebuffer driver
0003 ================================================
0004 
0005 0. Overview
0006 -----------
0007 The SH7760/SH7763 have an integrated LCD Display controller (LCDC) which
0008 supports (in theory) resolutions ranging from 1x1 to 1024x1024,
0009 with color depths ranging from 1 to 16 bits, on STN, DSTN and TFT Panels.
0010 
0011 Caveats:
0012 
0013 * Framebuffer memory must be a large chunk allocated at the top
0014   of Area3 (HW requirement). Because of this requirement you should NOT
0015   make the driver a module since at runtime it may become impossible to
0016   get a large enough contiguous chunk of memory.
0017 
0018 * The driver does not support changing resolution while loaded
0019   (displays aren't hotpluggable anyway)
0020 
0021 * Heavy flickering may be observed
0022   a) if you're using 15/16bit color modes at >= 640x480 px resolutions,
0023   b) during PCMCIA (or any other slow bus) activity.
0024 
0025 * Rotation works only 90degress clockwise, and only if horizontal
0026   resolution is <= 320 pixels.
0027 
0028 Files:
0029         - drivers/video/sh7760fb.c
0030         - include/asm-sh/sh7760fb.h
0031         - Documentation/fb/sh7760fb.rst
0032 
0033 1. Platform setup
0034 -----------------
0035 SH7760:
0036  Video data is fetched via the DMABRG DMA engine, so you have to
0037  configure the SH DMAC for DMABRG mode (write 0x94808080 to the
0038  DMARSRA register somewhere at boot).
0039 
0040  PFC registers PCCR and PCDR must be set to peripheral mode.
0041  (write zeros to both).
0042 
0043 The driver does NOT do the above for you since board setup is, well, job
0044 of the board setup code.
0045 
0046 2. Panel definitions
0047 --------------------
0048 The LCDC must explicitly be told about the type of LCD panel
0049 attached.  Data must be wrapped in a "struct sh7760fb_platdata" and
0050 passed to the driver as platform_data.
0051 
0052 Suggest you take a closer look at the SH7760 Manual, Section 30.
0053 (http://documentation.renesas.com/eng/products/mpumcu/e602291_sh7760.pdf)
0054 
0055 The following code illustrates what needs to be done to
0056 get the framebuffer working on a 640x480 TFT::
0057 
0058   #include <linux/fb.h>
0059   #include <asm/sh7760fb.h>
0060 
0061   /*
0062    * NEC NL6440bc26-01 640x480 TFT
0063    * dotclock 25175 kHz
0064    * Xres                640     Yres            480
0065    * Htotal      800     Vtotal          525
0066    * HsynStart   656     VsynStart       490
0067    * HsynLenn    30      VsynLenn        2
0068    *
0069    * The linux framebuffer layer does not use the syncstart/synclen
0070    * values but right/left/upper/lower margin values. The comments
0071    * for the x_margin explain how to calculate those from given
0072    * panel sync timings.
0073    */
0074   static struct fb_videomode nl6448bc26 = {
0075          .name           = "NL6448BC26",
0076          .refresh        = 60,
0077          .xres           = 640,
0078          .yres           = 480,
0079          .pixclock       = 39683,        /* in picoseconds! */
0080          .hsync_len      = 30,
0081          .vsync_len      = 2,
0082          .left_margin    = 114,  /* HTOT - (HSYNSLEN + HSYNSTART) */
0083          .right_margin   = 16,   /* HSYNSTART - XRES */
0084          .upper_margin   = 33,   /* VTOT - (VSYNLEN + VSYNSTART) */
0085          .lower_margin   = 10,   /* VSYNSTART - YRES */
0086          .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
0087          .vmode          = FB_VMODE_NONINTERLACED,
0088          .flag           = 0,
0089   };
0090 
0091   static struct sh7760fb_platdata sh7760fb_nl6448 = {
0092          .def_mode       = &nl6448bc26,
0093          .ldmtr          = LDMTR_TFT_COLOR_16,   /* 16bit TFT panel */
0094          .lddfr          = LDDFR_8BPP,           /* we want 8bit output */
0095          .ldpmmr         = 0x0070,
0096          .ldpspr         = 0x0500,
0097          .ldaclnr        = 0,
0098          .ldickr         = LDICKR_CLKSRC(LCDC_CLKSRC_EXTERNAL) |
0099                          LDICKR_CLKDIV(1),
0100          .rotate         = 0,
0101          .novsync        = 1,
0102          .blank          = NULL,
0103   };
0104 
0105   /* SH7760:
0106    * 0xFE300800: 256 * 4byte xRGB palette ram
0107    * 0xFE300C00: 42 bytes ctrl registers
0108    */
0109   static struct resource sh7760_lcdc_res[] = {
0110          [0] = {
0111                .start  = 0xFE300800,
0112                .end    = 0xFE300CFF,
0113                .flags  = IORESOURCE_MEM,
0114          },
0115          [1] = {
0116                .start  = 65,
0117                .end    = 65,
0118                .flags  = IORESOURCE_IRQ,
0119          },
0120   };
0121 
0122   static struct platform_device sh7760_lcdc_dev = {
0123          .dev    = {
0124                .platform_data = &sh7760fb_nl6448,
0125          },
0126          .name           = "sh7760-lcdc",
0127          .id             = -1,
0128          .resource       = sh7760_lcdc_res,
0129          .num_resources  = ARRAY_SIZE(sh7760_lcdc_res),
0130   };