0001 .. SPDX-License-Identifier: GPL-2.0
0002
0003 ================
0004 CPU Idle Cooling
0005 ================
0006
0007 Situation:
0008 ----------
0009
0010 Under certain circumstances a SoC can reach a critical temperature
0011 limit and is unable to stabilize the temperature around a temperature
0012 control. When the SoC has to stabilize the temperature, the kernel can
0013 act on a cooling device to mitigate the dissipated power. When the
0014 critical temperature is reached, a decision must be taken to reduce
0015 the temperature, that, in turn impacts performance.
0016
0017 Another situation is when the silicon temperature continues to
0018 increase even after the dynamic leakage is reduced to its minimum by
0019 clock gating the component. This runaway phenomenon can continue due
0020 to the static leakage. The only solution is to power down the
0021 component, thus dropping the dynamic and static leakage that will
0022 allow the component to cool down.
0023
0024 Last but not least, the system can ask for a specific power budget but
0025 because of the OPP density, we can only choose an OPP with a power
0026 budget lower than the requested one and under-utilize the CPU, thus
0027 losing performance. In other words, one OPP under-utilizes the CPU
0028 with a power less than the requested power budget and the next OPP
0029 exceeds the power budget. An intermediate OPP could have been used if
0030 it were present.
0031
0032 Solutions:
0033 ----------
0034
0035 If we can remove the static and the dynamic leakage for a specific
0036 duration in a controlled period, the SoC temperature will
0037 decrease. Acting on the idle state duration or the idle cycle
0038 injection period, we can mitigate the temperature by modulating the
0039 power budget.
0040
0041 The Operating Performance Point (OPP) density has a great influence on
0042 the control precision of cpufreq, however different vendors have a
0043 plethora of OPP density, and some have large power gap between OPPs,
0044 that will result in loss of performance during thermal control and
0045 loss of power in other scenarios.
0046
0047 At a specific OPP, we can assume that injecting idle cycle on all CPUs
0048 belong to the same cluster, with a duration greater than the cluster
0049 idle state target residency, we lead to dropping the static and the
0050 dynamic leakage for this period (modulo the energy needed to enter
0051 this state). So the sustainable power with idle cycles has a linear
0052 relation with the OPP’s sustainable power and can be computed with a
0053 coefficient similar to::
0054
0055 Power(IdleCycle) = Coef x Power(OPP)
0056
0057 Idle Injection:
0058 ---------------
0059
0060 The base concept of the idle injection is to force the CPU to go to an
0061 idle state for a specified time each control cycle, it provides
0062 another way to control CPU power and heat in addition to
0063 cpufreq. Ideally, if all CPUs belonging to the same cluster, inject
0064 their idle cycles synchronously, the cluster can reach its power down
0065 state with a minimum power consumption and reduce the static leakage
0066 to almost zero. However, these idle cycles injection will add extra
0067 latencies as the CPUs will have to wakeup from a deep sleep state.
0068
0069 We use a fixed duration of idle injection that gives an acceptable
0070 performance penalty and a fixed latency. Mitigation can be increased
0071 or decreased by modulating the duty cycle of the idle injection.
0072
0073 ::
0074
0075 ^
0076 |
0077 |
0078 |------- -------
0079 |_______|_______________________|_______|___________
0080
0081 <------>
0082 idle <---------------------->
0083 running
0084
0085 <----------------------------->
0086 duty cycle 25%
0087
0088
0089 The implementation of the cooling device bases the number of states on
0090 the duty cycle percentage. When no mitigation is happening the cooling
0091 device state is zero, meaning the duty cycle is 0%.
0092
0093 When the mitigation begins, depending on the governor's policy, a
0094 starting state is selected. With a fixed idle duration and the duty
0095 cycle (aka the cooling device state), the running duration can be
0096 computed.
0097
0098 The governor will change the cooling device state thus the duty cycle
0099 and this variation will modulate the cooling effect.
0100
0101 ::
0102
0103 ^
0104 |
0105 |
0106 |------- -------
0107 |_______|_______________|_______|___________
0108
0109 <------>
0110 idle <-------------->
0111 running
0112
0113 <--------------------->
0114 duty cycle 33%
0115
0116
0117 ^
0118 |
0119 |
0120 |------- -------
0121 |_______|_______|_______|___________
0122
0123 <------>
0124 idle <------>
0125 running
0126
0127 <------------->
0128 duty cycle 50%
0129
0130 The idle injection duration value must comply with the constraints:
0131
0132 - It is less than or equal to the latency we tolerate when the
0133 mitigation begins. It is platform dependent and will depend on the
0134 user experience, reactivity vs performance trade off we want. This
0135 value should be specified.
0136
0137 - It is greater than the idle state’s target residency we want to go
0138 for thermal mitigation, otherwise we end up consuming more energy.
0139
0140 Power considerations
0141 --------------------
0142
0143 When we reach the thermal trip point, we have to sustain a specified
0144 power for a specific temperature but at this time we consume::
0145
0146 Power = Capacitance x Voltage^2 x Frequency x Utilisation
0147
0148 ... which is more than the sustainable power (or there is something
0149 wrong in the system setup). The ‘Capacitance’ and ‘Utilisation’ are a
0150 fixed value, ‘Voltage’ and the ‘Frequency’ are fixed artificially
0151 because we don’t want to change the OPP. We can group the
0152 ‘Capacitance’ and the ‘Utilisation’ into a single term which is the
0153 ‘Dynamic Power Coefficient (Cdyn)’ Simplifying the above, we have::
0154
0155 Pdyn = Cdyn x Voltage^2 x Frequency
0156
0157 The power allocator governor will ask us somehow to reduce our power
0158 in order to target the sustainable power defined in the device
0159 tree. So with the idle injection mechanism, we want an average power
0160 (Ptarget) resulting in an amount of time running at full power on a
0161 specific OPP and idle another amount of time. That could be put in a
0162 equation::
0163
0164 P(opp)target = ((Trunning x (P(opp)running) + (Tidle x P(opp)idle)) /
0165 (Trunning + Tidle)
0166
0167 ...
0168
0169 Tidle = Trunning x ((P(opp)running / P(opp)target) - 1)
0170
0171 At this point if we know the running period for the CPU, that gives us
0172 the idle injection we need. Alternatively if we have the idle
0173 injection duration, we can compute the running duration with::
0174
0175 Trunning = Tidle / ((P(opp)running / P(opp)target) - 1)
0176
0177 Practically, if the running power is less than the targeted power, we
0178 end up with a negative time value, so obviously the equation usage is
0179 bound to a power reduction, hence a higher OPP is needed to have the
0180 running power greater than the targeted power.
0181
0182 However, in this demonstration we ignore three aspects:
0183
0184 * The static leakage is not defined here, we can introduce it in the
0185 equation but assuming it will be zero most of the time as it is
0186 difficult to get the values from the SoC vendors
0187
0188 * The idle state wake up latency (or entry + exit latency) is not
0189 taken into account, it must be added in the equation in order to
0190 rigorously compute the idle injection
0191
0192 * The injected idle duration must be greater than the idle state
0193 target residency, otherwise we end up consuming more energy and
0194 potentially invert the mitigation effect
0195
0196 So the final equation is::
0197
0198 Trunning = (Tidle - Twakeup ) x
0199 (((P(opp)dyn + P(opp)static ) - P(opp)target) / P(opp)target )