0001 =======================
0002 CPU cooling APIs How To
0003 =======================
0004
0005 Written by Amit Daniel Kachhap <amit.kachhap@linaro.org>
0006
0007 Updated: 6 Jan 2015
0008
0009 Copyright (c) 2012 Samsung Electronics Co., Ltd(http://www.samsung.com)
0010
0011 0. Introduction
0012 ===============
0013
0014 The generic cpu cooling(freq clipping) provides registration/unregistration APIs
0015 to the caller. The binding of the cooling devices to the trip point is left for
0016 the user. The registration APIs returns the cooling device pointer.
0017
0018 1. cpu cooling APIs
0019 ===================
0020
0021 1.1 cpufreq registration/unregistration APIs
0022 --------------------------------------------
0023
0024 ::
0025
0026 struct thermal_cooling_device
0027 *cpufreq_cooling_register(struct cpumask *clip_cpus)
0028
0029 This interface function registers the cpufreq cooling device with the name
0030 "thermal-cpufreq-%x". This api can support multiple instances of cpufreq
0031 cooling devices.
0032
0033 clip_cpus:
0034 cpumask of cpus where the frequency constraints will happen.
0035
0036 ::
0037
0038 struct thermal_cooling_device
0039 *of_cpufreq_cooling_register(struct cpufreq_policy *policy)
0040
0041 This interface function registers the cpufreq cooling device with
0042 the name "thermal-cpufreq-%x" linking it with a device tree node, in
0043 order to bind it via the thermal DT code. This api can support multiple
0044 instances of cpufreq cooling devices.
0045
0046 policy:
0047 CPUFreq policy.
0048
0049
0050 ::
0051
0052 void cpufreq_cooling_unregister(struct thermal_cooling_device *cdev)
0053
0054 This interface function unregisters the "thermal-cpufreq-%x" cooling device.
0055
0056 cdev: Cooling device pointer which has to be unregistered.
0057
0058 2. Power models
0059 ===============
0060
0061 The power API registration functions provide a simple power model for
0062 CPUs. The current power is calculated as dynamic power (static power isn't
0063 supported currently). This power model requires that the operating-points of
0064 the CPUs are registered using the kernel's opp library and the
0065 `cpufreq_frequency_table` is assigned to the `struct device` of the
0066 cpu. If you are using CONFIG_CPUFREQ_DT then the
0067 `cpufreq_frequency_table` should already be assigned to the cpu
0068 device.
0069
0070 The dynamic power consumption of a processor depends on many factors.
0071 For a given processor implementation the primary factors are:
0072
0073 - The time the processor spends running, consuming dynamic power, as
0074 compared to the time in idle states where dynamic consumption is
0075 negligible. Herein we refer to this as 'utilisation'.
0076 - The voltage and frequency levels as a result of DVFS. The DVFS
0077 level is a dominant factor governing power consumption.
0078 - In running time the 'execution' behaviour (instruction types, memory
0079 access patterns and so forth) causes, in most cases, a second order
0080 variation. In pathological cases this variation can be significant,
0081 but typically it is of a much lesser impact than the factors above.
0082
0083 A high level dynamic power consumption model may then be represented as::
0084
0085 Pdyn = f(run) * Voltage^2 * Frequency * Utilisation
0086
0087 f(run) here represents the described execution behaviour and its
0088 result has a units of Watts/Hz/Volt^2 (this often expressed in
0089 mW/MHz/uVolt^2)
0090
0091 The detailed behaviour for f(run) could be modelled on-line. However,
0092 in practice, such an on-line model has dependencies on a number of
0093 implementation specific processor support and characterisation
0094 factors. Therefore, in initial implementation that contribution is
0095 represented as a constant coefficient. This is a simplification
0096 consistent with the relative contribution to overall power variation.
0097
0098 In this simplified representation our model becomes::
0099
0100 Pdyn = Capacitance * Voltage^2 * Frequency * Utilisation
0101
0102 Where `capacitance` is a constant that represents an indicative
0103 running time dynamic power coefficient in fundamental units of
0104 mW/MHz/uVolt^2. Typical values for mobile CPUs might lie in range
0105 from 100 to 500. For reference, the approximate values for the SoC in
0106 ARM's Juno Development Platform are 530 for the Cortex-A57 cluster and
0107 140 for the Cortex-A53 cluster.