0001 .. SPDX-License-Identifier: GPL-2.0
0002
0003 The cpia2 driver
0004 ================
0005
0006 Authors: Peter Pregler <Peter_Pregler@email.com>,
0007 Scott J. Bertin <scottbertin@yahoo.com>, and
0008 Jarl Totland <Jarl.Totland@bdc.no> for the original cpia driver, which
0009 this one was modelled from.
0010
0011
0012 Notes to developers
0013 ~~~~~~~~~~~~~~~~~~~
0014
0015 - This is a driver version stripped of the 2.4 back compatibility
0016 and old MJPEG ioctl API. See cpia2.sf.net for 2.4 support.
0017
0018 Programmer's overview of cpia2 driver
0019 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
0020
0021 Cpia2 is the second generation video coprocessor from VLSI Vision Ltd (now a
0022 division of ST Microelectronics). There are two versions. The first is the
0023 STV0672, which is capable of up to 30 frames per second (fps) in frame sizes
0024 up to CIF, and 15 fps for VGA frames. The STV0676 is an improved version,
0025 which can handle up to 30 fps VGA. Both coprocessors can be attached to two
0026 CMOS sensors - the vvl6410 CIF sensor and the vvl6500 VGA sensor. These will
0027 be referred to as the 410 and the 500 sensors, or the CIF and VGA sensors.
0028
0029 The two chipsets operate almost identically. The core is an 8051 processor,
0030 running two different versions of firmware. The 672 runs the VP4 video
0031 processor code, the 676 runs VP5. There are a few differences in register
0032 mappings for the two chips. In these cases, the symbols defined in the
0033 header files are marked with VP4 or VP5 as part of the symbol name.
0034
0035 The cameras appear externally as three sets of registers. Setting register
0036 values is the only way to control the camera. Some settings are
0037 interdependant, such as the sequence required to power up the camera. I will
0038 try to make note of all of these cases.
0039
0040 The register sets are called blocks. Block 0 is the system block. This
0041 section is always powered on when the camera is plugged in. It contains
0042 registers that control housekeeping functions such as powering up the video
0043 processor. The video processor is the VP block. These registers control
0044 how the video from the sensor is processed. Examples are timing registers,
0045 user mode (vga, qvga), scaling, cropping, framerates, and so on. The last
0046 block is the video compressor (VC). The video stream sent from the camera is
0047 compressed as Motion JPEG (JPEGA). The VC controls all of the compression
0048 parameters. Looking at the file cpia2_registers.h, you can get a full view
0049 of these registers and the possible values for most of them.
0050
0051 One or more registers can be set or read by sending a usb control message to
0052 the camera. There are three modes for this. Block mode requests a number
0053 of contiguous registers. Random mode reads or writes random registers with
0054 a tuple structure containing address/value pairs. The repeat mode is only
0055 used by VP4 to load a firmware patch. It contains a starting address and
0056 a sequence of bytes to be written into a gpio port.
