0001 ========================
0002 The Common Clk Framework
0003 ========================
0004
0005 :Author: Mike Turquette <mturquette@ti.com>
0006
0007 This document endeavours to explain the common clk framework details,
0008 and how to port a platform over to this framework. It is not yet a
0009 detailed explanation of the clock api in include/linux/clk.h, but
0010 perhaps someday it will include that information.
0011
0012 Introduction and interface split
0013 ================================
0014
0015 The common clk framework is an interface to control the clock nodes
0016 available on various devices today. This may come in the form of clock
0017 gating, rate adjustment, muxing or other operations. This framework is
0018 enabled with the CONFIG_COMMON_CLK option.
0019
0020 The interface itself is divided into two halves, each shielded from the
0021 details of its counterpart. First is the common definition of struct
0022 clk which unifies the framework-level accounting and infrastructure that
0023 has traditionally been duplicated across a variety of platforms. Second
0024 is a common implementation of the clk.h api, defined in
0025 drivers/clk/clk.c. Finally there is struct clk_ops, whose operations
0026 are invoked by the clk api implementation.
0027
0028 The second half of the interface is comprised of the hardware-specific
0029 callbacks registered with struct clk_ops and the corresponding
0030 hardware-specific structures needed to model a particular clock. For
0031 the remainder of this document any reference to a callback in struct
0032 clk_ops, such as .enable or .set_rate, implies the hardware-specific
0033 implementation of that code. Likewise, references to struct clk_foo
0034 serve as a convenient shorthand for the implementation of the
0035 hardware-specific bits for the hypothetical "foo" hardware.
0036
0037 Tying the two halves of this interface together is struct clk_hw, which
0038 is defined in struct clk_foo and pointed to within struct clk_core. This
0039 allows for easy navigation between the two discrete halves of the common
0040 clock interface.
0041
0042 Common data structures and api
0043 ==============================
0044
0045 Below is the common struct clk_core definition from
0046 drivers/clk/clk.c, modified for brevity::
0047
0048 struct clk_core {
0049 const char *name;
0050 const struct clk_ops *ops;
0051 struct clk_hw *hw;
0052 struct module *owner;
0053 struct clk_core *parent;
0054 const char **parent_names;
0055 struct clk_core **parents;
0056 u8 num_parents;
0057 u8 new_parent_index;
0058 ...
0059 };
0060
0061 The members above make up the core of the clk tree topology. The clk
0062 api itself defines several driver-facing functions which operate on
0063 struct clk. That api is documented in include/linux/clk.h.
0064
0065 Platforms and devices utilizing the common struct clk_core use the struct
0066 clk_ops pointer in struct clk_core to perform the hardware-specific parts of
0067 the operations defined in clk-provider.h::
0068
0069 struct clk_ops {
0070 int (*prepare)(struct clk_hw *hw);
0071 void (*unprepare)(struct clk_hw *hw);
0072 int (*is_prepared)(struct clk_hw *hw);
0073 void (*unprepare_unused)(struct clk_hw *hw);
0074 int (*enable)(struct clk_hw *hw);
0075 void (*disable)(struct clk_hw *hw);
0076 int (*is_enabled)(struct clk_hw *hw);
0077 void (*disable_unused)(struct clk_hw *hw);
0078 unsigned long (*recalc_rate)(struct clk_hw *hw,
0079 unsigned long parent_rate);
0080 long (*round_rate)(struct clk_hw *hw,
0081 unsigned long rate,
0082 unsigned long *parent_rate);
0083 int (*determine_rate)(struct clk_hw *hw,
0084 struct clk_rate_request *req);
0085 int (*set_parent)(struct clk_hw *hw, u8 index);
0086 u8 (*get_parent)(struct clk_hw *hw);
0087 int (*set_rate)(struct clk_hw *hw,
0088 unsigned long rate,
0089 unsigned long parent_rate);
0090 int (*set_rate_and_parent)(struct clk_hw *hw,
0091 unsigned long rate,
0092 unsigned long parent_rate,
0093 u8 index);
0094 unsigned long (*recalc_accuracy)(struct clk_hw *hw,
0095 unsigned long parent_accuracy);
0096 int (*get_phase)(struct clk_hw *hw);
0097 int (*set_phase)(struct clk_hw *hw, int degrees);
0098 void (*init)(struct clk_hw *hw);
0099 void (*debug_init)(struct clk_hw *hw,
0100 struct dentry *dentry);
0101 };
0102
0103 Hardware clk implementations
0104 ============================
0105
0106 The strength of the common struct clk_core comes from its .ops and .hw pointers
0107 which abstract the details of struct clk from the hardware-specific bits, and
0108 vice versa. To illustrate consider the simple gateable clk implementation in
0109 drivers/clk/clk-gate.c::
0110
0111 struct clk_gate {
0112 struct clk_hw hw;
0113 void __iomem *reg;
0114 u8 bit_idx;
0115 ...
0116 };
0117
0118 struct clk_gate contains struct clk_hw hw as well as hardware-specific
0119 knowledge about which register and bit controls this clk's gating.
0120 Nothing about clock topology or accounting, such as enable_count or
0121 notifier_count, is needed here. That is all handled by the common
0122 framework code and struct clk_core.
0123
0124 Let's walk through enabling this clk from driver code::
0125
0126 struct clk *clk;
0127 clk = clk_get(NULL, "my_gateable_clk");
0128
0129 clk_prepare(clk);
0130 clk_enable(clk);
0131
0132 The call graph for clk_enable is very simple::
0133
0134 clk_enable(clk);
0135 clk->ops->enable(clk->hw);
0136 [resolves to...]
0137 clk_gate_enable(hw);
0138 [resolves struct clk gate with to_clk_gate(hw)]
0139 clk_gate_set_bit(gate);
0140
0141 And the definition of clk_gate_set_bit::
0142
0143 static void clk_gate_set_bit(struct clk_gate *gate)
0144 {
0145 u32 reg;
0146
0147 reg = __raw_readl(gate->reg);
0148 reg |= BIT(gate->bit_idx);
0149 writel(reg, gate->reg);
0150 }
0151
0152 Note that to_clk_gate is defined as::
0153
0154 #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
0155
0156 This pattern of abstraction is used for every clock hardware
0157 representation.
0158
0159 Supporting your own clk hardware
0160 ================================
0161
0162 When implementing support for a new type of clock it is only necessary to
0163 include the following header::
0164
0165 #include <linux/clk-provider.h>
0166
0167 To construct a clk hardware structure for your platform you must define
0168 the following::
0169
0170 struct clk_foo {
0171 struct clk_hw hw;
0172 ... hardware specific data goes here ...
0173 };
0174
0175 To take advantage of your data you'll need to support valid operations
0176 for your clk::
0177
0178 struct clk_ops clk_foo_ops = {
0179 .enable = &clk_foo_enable,
0180 .disable = &clk_foo_disable,
0181 };
0182
0183 Implement the above functions using container_of::
0184
0185 #define to_clk_foo(_hw) container_of(_hw, struct clk_foo, hw)
0186
0187 int clk_foo_enable(struct clk_hw *hw)
0188 {
0189 struct clk_foo *foo;
0190
0191 foo = to_clk_foo(hw);
0192
0193 ... perform magic on foo ...
0194
0195 return 0;
0196 };
0197
0198 Below is a matrix detailing which clk_ops are mandatory based upon the
0199 hardware capabilities of that clock. A cell marked as "y" means
0200 mandatory, a cell marked as "n" implies that either including that
0201 callback is invalid or otherwise unnecessary. Empty cells are either
0202 optional or must be evaluated on a case-by-case basis.
0203
0204 .. table:: clock hardware characteristics
0205
0206 +----------------+------+-------------+---------------+-------------+------+
0207 | | gate | change rate | single parent | multiplexer | root |
0208 +================+======+=============+===============+=============+======+
0209 |.prepare | | | | | |
0210 +----------------+------+-------------+---------------+-------------+------+
0211 |.unprepare | | | | | |
0212 +----------------+------+-------------+---------------+-------------+------+
0213 +----------------+------+-------------+---------------+-------------+------+
0214 |.enable | y | | | | |
0215 +----------------+------+-------------+---------------+-------------+------+
0216 |.disable | y | | | | |
0217 +----------------+------+-------------+---------------+-------------+------+
0218 |.is_enabled | y | | | | |
0219 +----------------+------+-------------+---------------+-------------+------+
0220 +----------------+------+-------------+---------------+-------------+------+
0221 |.recalc_rate | | y | | | |
0222 +----------------+------+-------------+---------------+-------------+------+
0223 |.round_rate | | y [1]_ | | | |
0224 +----------------+------+-------------+---------------+-------------+------+
0225 |.determine_rate | | y [1]_ | | | |
0226 +----------------+------+-------------+---------------+-------------+------+
0227 |.set_rate | | y | | | |
0228 +----------------+------+-------------+---------------+-------------+------+
0229 +----------------+------+-------------+---------------+-------------+------+
0230 |.set_parent | | | n | y | n |
0231 +----------------+------+-------------+---------------+-------------+------+
0232 |.get_parent | | | n | y | n |
0233 +----------------+------+-------------+---------------+-------------+------+
0234 +----------------+------+-------------+---------------+-------------+------+
0235 |.recalc_accuracy| | | | | |
0236 +----------------+------+-------------+---------------+-------------+------+
0237 +----------------+------+-------------+---------------+-------------+------+
0238 |.init | | | | | |
0239 +----------------+------+-------------+---------------+-------------+------+
0240
0241 .. [1] either one of round_rate or determine_rate is required.
0242
0243 Finally, register your clock at run-time with a hardware-specific
0244 registration function. This function simply populates struct clk_foo's
0245 data and then passes the common struct clk parameters to the framework
0246 with a call to::
0247
0248 clk_register(...)
0249
0250 See the basic clock types in ``drivers/clk/clk-*.c`` for examples.
0251
0252 Disabling clock gating of unused clocks
0253 =======================================
0254
0255 Sometimes during development it can be useful to be able to bypass the
0256 default disabling of unused clocks. For example, if drivers aren't enabling
0257 clocks properly but rely on them being on from the bootloader, bypassing
0258 the disabling means that the driver will remain functional while the issues
0259 are sorted out.
0260
0261 To bypass this disabling, include "clk_ignore_unused" in the bootargs to the
0262 kernel.
0263
0264 Locking
0265 =======
0266
0267 The common clock framework uses two global locks, the prepare lock and the
0268 enable lock.
0269
0270 The enable lock is a spinlock and is held across calls to the .enable,
0271 .disable operations. Those operations are thus not allowed to sleep,
0272 and calls to the clk_enable(), clk_disable() API functions are allowed in
0273 atomic context.
0274
0275 For clk_is_enabled() API, it is also designed to be allowed to be used in
0276 atomic context. However, it doesn't really make any sense to hold the enable
0277 lock in core, unless you want to do something else with the information of
0278 the enable state with that lock held. Otherwise, seeing if a clk is enabled is
0279 a one-shot read of the enabled state, which could just as easily change after
0280 the function returns because the lock is released. Thus the user of this API
0281 needs to handle synchronizing the read of the state with whatever they're
0282 using it for to make sure that the enable state doesn't change during that
0283 time.
0284
0285 The prepare lock is a mutex and is held across calls to all other operations.
0286 All those operations are allowed to sleep, and calls to the corresponding API
0287 functions are not allowed in atomic context.
0288
0289 This effectively divides operations in two groups from a locking perspective.
0290
0291 Drivers don't need to manually protect resources shared between the operations
0292 of one group, regardless of whether those resources are shared by multiple
0293 clocks or not. However, access to resources that are shared between operations
0294 of the two groups needs to be protected by the drivers. An example of such a
0295 resource would be a register that controls both the clock rate and the clock
0296 enable/disable state.
0297
0298 The clock framework is reentrant, in that a driver is allowed to call clock
0299 framework functions from within its implementation of clock operations. This
0300 can for instance cause a .set_rate operation of one clock being called from
0301 within the .set_rate operation of another clock. This case must be considered
0302 in the driver implementations, but the code flow is usually controlled by the
0303 driver in that case.
0304
0305 Note that locking must also be considered when code outside of the common
0306 clock framework needs to access resources used by the clock operations. This
0307 is considered out of scope of this document.
