0001 MSM SoC HSUSB controllers
0002
0003 EHCI
0004
0005 Required properties:
0006 - compatible: Should contain "qcom,ehci-host"
0007 - regs: offset and length of the register set in the memory map
0008 - usb-phy: phandle for the PHY device
0009
0010 Example EHCI controller device node:
0011
0012 ehci: ehci@f9a55000 {
0013 compatible = "qcom,ehci-host";
0014 reg = <0xf9a55000 0x400>;
0015 usb-phy = <&usb_otg>;
0016 };
0017
0018 USB PHY with optional OTG:
0019
0020 Required properties:
0021 - compatible: Should contain:
0022 "qcom,usb-otg-ci" for chipsets with ChipIdea 45nm PHY
0023 "qcom,usb-otg-snps" for chipsets with Synopsys 28nm PHY
0024
0025 - regs: Offset and length of the register set in the memory map
0026 - interrupts: interrupt-specifier for the OTG interrupt.
0027
0028 - clocks: A list of phandle + clock-specifier pairs for the
0029 clocks listed in clock-names
0030 - clock-names: Should contain the following:
0031 "phy" USB PHY reference clock
0032 "core" Protocol engine clock
0033 "iface" Interface bus clock
0034 "alt_core" Protocol engine clock for targets with asynchronous
0035 reset methodology. (optional)
0036
0037 - vdccx-supply: phandle to the regulator for the vdd supply for
0038 digital circuit operation.
0039 - v1p8-supply: phandle to the regulator for the 1.8V supply
0040 - v3p3-supply: phandle to the regulator for the 3.3V supply
0041
0042 - resets: A list of phandle + reset-specifier pairs for the
0043 resets listed in reset-names
0044 - reset-names: Should contain the following:
0045 "phy" USB PHY controller reset
0046 "link" USB LINK controller reset
0047
0048 - qcom,otg-control: OTG control (VBUS and ID notifications) can be one of
0049 1 - PHY control
0050 2 - PMIC control
0051
0052 Optional properties:
0053 - dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg"
0054
0055 - switch-gpio: A phandle + gpio-specifier pair. Some boards are using Dual
0056 SPDT USB Switch, witch is cotrolled by GPIO to de/multiplex
0057 D+/D- USB lines between connectors.
0058
0059 - qcom,phy-init-sequence: PHY configuration sequence values. This is related to Device
0060 Mode Eye Diagram test. Start address at which these values will be
0061 written is ULPI_EXT_VENDOR_SPECIFIC. Value of -1 is reserved as
0062 "do not overwrite default value at this address".
0063 For example: qcom,phy-init-sequence = < -1 0x63 >;
0064 Will update only value at address ULPI_EXT_VENDOR_SPECIFIC + 1.
0065
0066 - qcom,phy-num: Select number of pyco-phy to use, can be one of
0067 0 - PHY one, default
0068 1 - Second PHY
0069 Some platforms may have configuration to allow USB
0070 controller work with any of the two HSPHYs present.
0071
0072 - qcom,vdd-levels: This property must be a list of three integer values
0073 (no, min, max) where each value represents either a voltage
0074 in microvolts or a value corresponding to voltage corner.
0075
0076 - qcom,manual-pullup: If present, vbus is not routed to USB controller/phy
0077 and controller driver therefore enables pull-up explicitly
0078 before starting controller using usbcmd run/stop bit.
0079
0080 - extcon: phandles to external connector devices. First phandle
0081 should point to external connector, which provide "USB"
0082 cable events, the second should point to external connector
0083 device, which provide "USB-HOST" cable events. If one of
0084 the external connector devices is not required empty <0>
0085 phandle should be specified.
0086
0087 Example HSUSB OTG controller device node:
0088
0089 usb@f9a55000 {
0090 compatible = "qcom,usb-otg-snps";
0091 reg = <0xf9a55000 0x400>;
0092 interrupts = <0 134 0>;
0093 dr_mode = "peripheral";
0094
0095 clocks = <&gcc GCC_XO_CLK>, <&gcc GCC_USB_HS_SYSTEM_CLK>,
0096 <&gcc GCC_USB_HS_AHB_CLK>;
0097
0098 clock-names = "phy", "core", "iface";
0099
0100 vddcx-supply = <&pm8841_s2_corner>;
0101 v1p8-supply = <&pm8941_l6>;
0102 v3p3-supply = <&pm8941_l24>;
0103
0104 resets = <&gcc GCC_USB2A_PHY_BCR>, <&gcc GCC_USB_HS_BCR>;
0105 reset-names = "phy", "link";
0106
0107 qcom,otg-control = <1>;
0108 qcom,phy-init-sequence = < -1 0x63 >;
0109 qcom,vdd-levels = <1 5 7>;
0110 };
