0001 Cavium SuperSpeed DWC3 USB SoC controller
0002
0003 Required properties:
0004 - compatible: Should contain "cavium,octeon-7130-usb-uctl"
0005
0006 Required child node:
0007 A child node must exist to represent the core DWC3 IP block. The name of
0008 the node is not important. The content of the node is defined in dwc3.txt.
0009
0010 Example device node:
0011
0012 uctl@1180069000000 {
0013 compatible = "cavium,octeon-7130-usb-uctl";
0014 reg = <0x00011800 0x69000000 0x00000000 0x00000100>;
0015 ranges;
0016 #address-cells = <0x00000002>;
0017 #size-cells = <0x00000002>;
0018 refclk-frequency = <0x05f5e100>;
0019 refclk-type-ss = "dlmc_ref_clk0";
0020 refclk-type-hs = "dlmc_ref_clk0";
0021 power = <0x00000002 0x00000002 0x00000001>;
0022 xhci@1690000000000 {
0023 compatible = "cavium,octeon-7130-xhci", "snps,dwc3";
0024 reg = <0x00016900 0x00000000 0x00000010 0x00000000>;
0025 interrupt-parent = <0x00000010>;
0026 interrupts = <0x00000009 0x00000004>;
0027 };
0028 };
