0001 * USB2 ChipIdea USB controller for ci13xxx
0002
0003 Required properties:
0004 - compatible: should be one of:
0005 "fsl,imx23-usb"
0006 "fsl,imx27-usb"
0007 "fsl,imx28-usb"
0008 "fsl,imx6q-usb"
0009 "fsl,imx6sl-usb"
0010 "fsl,imx6sx-usb"
0011 "fsl,imx6ul-usb"
0012 "fsl,imx7d-usb"
0013 "fsl,imx7ulp-usb"
0014 "lsi,zevio-usb"
0015 "qcom,ci-hdrc"
0016 "chipidea,usb2"
0017 "xlnx,zynq-usb-2.20a"
0018 "nvidia,tegra20-udc"
0019 "nvidia,tegra30-udc"
0020 "nvidia,tegra114-udc"
0021 "nvidia,tegra124-udc"
0022 - reg: base address and length of the registers
0023 - interrupts: interrupt for the USB controller
0024
0025 Recommended properies:
0026 - phy_type: the type of the phy connected to the core. Should be one
0027 of "utmi", "utmi_wide", "ulpi", "serial" or "hsic". Without this
0028 property the PORTSC register won't be touched.
0029 - dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg"
0030
0031 Deprecated properties:
0032 - usb-phy: phandle for the PHY device. Use "phys" instead.
0033 - fsl,usbphy: phandle of usb phy that connects to the port. Use "phys" instead.
0034
0035 Optional properties:
0036 - clocks: reference to the USB clock
0037 - phys: reference to the USB PHY
0038 - phy-names: should be "usb-phy"
0039 - vbus-supply: reference to the VBUS regulator
0040 - maximum-speed: limit the maximum connection speed to "full-speed".
0041 - tpl-support: TPL (Targeted Peripheral List) feature for targeted hosts
0042 - itc-setting: interrupt threshold control register control, the setting
0043 should be aligned with ITC bits at register USBCMD.
0044 - ahb-burst-config: it is vendor dependent, the required value should be
0045 aligned with AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This
0046 property is used to change AHB burst configuration, check the chipidea
0047 spec for meaning of each value. If this property is not existed, it
0048 will use the reset value.
0049 - tx-burst-size-dword: it is vendor dependent, the tx burst size in dword
0050 (4 bytes), This register represents the maximum length of a the burst
0051 in 32-bit words while moving data from system memory to the USB
0052 bus, the value of this property will only take effect if property
0053 "ahb-burst-config" is set to 0, if this property is missing the reset
0054 default of the hardware implementation will be used.
0055 - rx-burst-size-dword: it is vendor dependent, the rx burst size in dword
0056 (4 bytes), This register represents the maximum length of a the burst
0057 in 32-bit words while moving data from the USB bus to system memory,
0058 the value of this property will only take effect if property
0059 "ahb-burst-config" is set to 0, if this property is missing the reset
0060 default of the hardware implementation will be used.
0061 - extcon: phandles to external connector devices. First phandle should point to
0062 external connector, which provide "USB" cable events, the second should point
0063 to external connector device, which provide "USB-HOST" cable events. If one
0064 of the external connector devices is not required, empty <0> phandle should
0065 be specified.
0066 - phy-clkgate-delay-us: the delay time (us) between putting the PHY into
0067 low power mode and gating the PHY clock.
0068 - non-zero-ttctrl-ttha: after setting this property, the value of register
0069 ttctrl.ttha will be 0x7f; if not, the value will be 0x0, this is the default
0070 value. It needs to be very carefully for setting this property, it is
0071 recommended that consult with your IC engineer before setting this value.
0072 On the most of chipidea platforms, the "usage_tt" flag at RTL is 0, so this
0073 property only affects siTD.
0074 If this property is not set, the max packet size is 1023 bytes, and if
0075 the total of packet size for pervious transactions are more than 256 bytes,
0076 it can't accept any transactions within this frame. The use case is single
0077 transaction, but higher frame rate.
0078 If this property is set, the max packet size is 188 bytes, it can handle
0079 more transactions than above case, it can accept transactions until it
0080 considers the left room size within frame is less than 188 bytes, software
0081 needs to make sure it does not send more than 90%
0082 maximum_periodic_data_per_frame. The use case is multiple transactions, but
0083 less frame rate.
0084 - mux-controls: The mux control for toggling host/device output of this
0085 controller. It's expected that a mux state of 0 indicates device mode and a
0086 mux state of 1 indicates host mode.
0087 - mux-control-names: Shall be "usb_switch" if mux-controls is specified.
0088 - pinctrl-names: Names for optional pin modes in "default", "host", "device".
0089 In case of HSIC-mode, "idle" and "active" pin modes are mandatory. In this
0090 case, the "idle" state needs to pull down the data and strobe pin
0091 and the "active" state needs to pull up the strobe pin.
0092 - pinctrl-n: alternate pin modes
0093
0094 i.mx specific properties
0095 - fsl,usbmisc: phandler of non-core register device, with one
0096 argument that indicate usb controller index
0097 - disable-over-current: disable over current detect
0098 - over-current-active-low: over current signal polarity is active low.
0099 - over-current-active-high: over current signal polarity is active high.
0100 It's recommended to specify the over current polarity.
0101 - power-active-high: power signal polarity is active high
0102 - external-vbus-divider: enables off-chip resistor divider for Vbus
0103 - samsung,picophy-pre-emp-curr-control: HS Transmitter Pre-Emphasis Current
0104 Control. This signal controls the amount of current sourced to the
0105 USB_OTG*_DP and USB_OTG*_DN pins after a J-to-K or K-to-J transition.
0106 The range is from 0x0 to 0x3, the default value is 0x1.
0107 Details can refer to TXPREEMPAMPTUNE0 bits of USBNC_n_PHY_CFG1.
0108 - samsung,picophy-dc-vol-level-adjust: HS DC Voltage Level Adjustment.
0109 Adjust the high-speed transmitter DC level voltage.
0110 The range is from 0x0 to 0xf, the default value is 0x3.
0111 Details can refer to TXVREFTUNE0 bits of USBNC_n_PHY_CFG1.
0112
0113 Example:
0114
0115 usb@f7ed0000 {
0116 compatible = "chipidea,usb2";
0117 reg = <0xf7ed0000 0x10000>;
0118 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
0119 clocks = <&chip CLKID_USB0>;
0120 phys = <&usb_phy0>;
0121 phy-names = "usb-phy";
0122 vbus-supply = <®_usb0_vbus>;
0123 itc-setting = <0x4>; /* 4 micro-frames */
0124 /* Incremental burst of unspecified length */
0125 ahb-burst-config = <0x0>;
0126 tx-burst-size-dword = <0x10>; /* 64 bytes */
0127 rx-burst-size-dword = <0x10>;
0128 extcon = <0>, <&usb_id>;
0129 phy-clkgate-delay-us = <400>;
0130 mux-controls = <&usb_switch>;
0131 mux-control-names = "usb_switch";
0132 };
0133
0134 Example for HSIC:
0135
0136 usb@2184400 {
0137 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
0138 reg = <0x02184400 0x200>;
0139 interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
0140 clocks = <&clks IMX6QDL_CLK_USBOH3>;
0141 fsl,usbphy = <&usbphynop1>;
0142 fsl,usbmisc = <&usbmisc 2>;
0143 phy_type = "hsic";
0144 dr_mode = "host";
0145 ahb-burst-config = <0x0>;
0146 tx-burst-size-dword = <0x10>;
0147 rx-burst-size-dword = <0x10>;
0148 pinctrl-names = "idle", "active";
0149 pinctrl-0 = <&pinctrl_usbh2_idle>;
0150 pinctrl-1 = <&pinctrl_usbh2_active>;
0151 #address-cells = <1>;
0152 #size-cells = <0>;
0153
0154 usbnet: ethernet@1 {
0155 compatible = "usb424,9730";
0156 reg = <1>;
0157 };
0158 };
