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OSCL-LXR

 
 

    


0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/ufs/renesas,ufs.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: Renesas R-Car UFS Host Controller
0008 
0009 maintainers:
0010   - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
0011 
0012 allOf:
0013   - $ref: ufs-common.yaml
0014 
0015 properties:
0016   compatible:
0017     const: renesas,r8a779f0-ufs
0018 
0019   reg:
0020     maxItems: 1
0021 
0022   clocks:
0023     maxItems: 2
0024 
0025   clock-names:
0026     items:
0027       - const: fck
0028       - const: ref_clk
0029 
0030   power-domains:
0031     maxItems: 1
0032 
0033   resets:
0034     maxItems: 1
0035 
0036 required:
0037   - compatible
0038   - reg
0039   - clocks
0040   - clock-names
0041   - power-domains
0042   - resets
0043 
0044 unevaluatedProperties: false
0045 
0046 examples:
0047   - |
0048     #include <dt-bindings/clock/r8a779f0-cpg-mssr.h>
0049     #include <dt-bindings/interrupt-controller/arm-gic.h>
0050     #include <dt-bindings/power/r8a779f0-sysc.h>
0051 
0052     ufs: ufs@e686000 {
0053             compatible = "renesas,r8a779f0-ufs";
0054             reg = <0xe6860000 0x100>;
0055             interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
0056             clocks = <&cpg CPG_MOD 1514>, <&ufs30_clk>;
0057             clock-names = "fck", "ref_clk";
0058             freq-table-hz = <200000000 200000000>, <38400000 38400000>;
0059             power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
0060             resets = <&cpg 1514>;
0061     };