bindings/ufs/mediatek%2Cufs.yaml

0001 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/ufs/mediatek,ufs.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Mediatek Universal Flash Storage (UFS) Controller
0008
0009 maintainers:
0010   - Stanley Chu <stanley.chu@mediatek.com>
0011
0012 allOf:
0013   - $ref: ufs-common.yaml
0014
0015 properties:
0016   compatible:
0017     enum:
0018       - mediatek,mt8183-ufshci
0019       - mediatek,mt8192-ufshci
0020
0021   clocks:
0022     maxItems: 1
0023
0024   clock-names:
0025     items:
0026       - const: ufs
0027
0028   phys:
0029     maxItems: 1
0030
0031   reg:
0032     maxItems: 1
0033
0034   vcc-supply: true
0035
0036 required:
0037   - compatible
0038   - clocks
0039   - clock-names
0040   - phys
0041   - reg
0042   - vcc-supply
0043
0044 unevaluatedProperties: false
0045
0046 examples:
0047   - |
0048     #include <dt-bindings/clock/mt8183-clk.h>
0049     #include <dt-bindings/interrupt-controller/arm-gic.h>
0050
0051     soc {
0052         #address-cells = <2>;
0053         #size-cells = <2>;
0054
0055         ufs@ff3c0000 {
0056             compatible = "mediatek,mt8183-ufshci";
0057             reg = <0 0x11270000 0 0x2300>;
0058             interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>;
0059             phys = <&ufsphy>;
0060
0061             clocks = <&infracfg_ao CLK_INFRA_UFS>;
0062             clock-names = "ufs";
0063             freq-table-hz = <0 0>;
0064
0065             vcc-supply = <&mt_pmic_vemc_ldo_reg>;
0066         };
0067     };