0001 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/ufs/cdns,ufshc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Cadence Universal Flash Storage (UFS) Controller
0008
0009 maintainers:
0010 - Jan Kotas <jank@cadence.com>
0011
0012 # Select only our matches, not all jedec,ufs-2.0
0013 select:
0014 properties:
0015 compatible:
0016 contains:
0017 enum:
0018 - cdns,ufshc
0019 - cdns,ufshc-m31-16nm
0020 required:
0021 - compatible
0022
0023 allOf:
0024 - $ref: ufs-common.yaml
0025
0026 properties:
0027 compatible:
0028 items:
0029 - enum:
0030 - cdns,ufshc
0031 # CDNS UFS HC + M31 16nm PHY
0032 - cdns,ufshc-m31-16nm
0033 - const: jedec,ufs-2.0
0034
0035 clocks:
0036 minItems: 1
0037 maxItems: 3
0038
0039 clock-names:
0040 minItems: 1
0041 items:
0042 - const: core_clk
0043 - const: phy_clk
0044 - const: ref_clk
0045
0046 power-domains:
0047 maxItems: 1
0048
0049 reg:
0050 maxItems: 1
0051
0052 required:
0053 - compatible
0054 - clocks
0055 - clock-names
0056 - reg
0057
0058 unevaluatedProperties: false
0059
0060 examples:
0061 - |
0062 #include <dt-bindings/interrupt-controller/arm-gic.h>
0063
0064 ufs@fd030000 {
0065 compatible = "cdns,ufshc", "jedec,ufs-2.0";
0066 reg = <0xfd030000 0x10000>;
0067 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
0068 freq-table-hz = <0 0>, <0 0>;
0069 clocks = <&ufs_core_clk>, <&ufs_phy_clk>;
0070 clock-names = "core_clk", "phy_clk";
0071 };
